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Address conflict detection system employing address indirection for use in a high-speed multi-processor system

  • US 5,875,472 A
  • Filed: 01/29/1997
  • Issued: 02/23/1999
  • Est. Priority Date: 01/29/1997
  • Status: Expired due to Term
First Claim
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1. For use in a data processing system in which multiple requesters are each coupled to a first memory for requesting access to the first memory at a request address and wherein ones of the multiple requesters can come in conflict by attempting to gain access to the same request address, the data processing system further having memory priority logic coupled to each of the multiple requesters and to the first memory for selecting ones of the request addresses to be provided to the first memory, wherein the first memory determines whether each of the selected ones of the request addresses is a non-resident request address which is not resident within the first memory, the data processing system further having a second memory coupled to the memory priority logic, an improved conflict detection system, comprising:

  • pointer generation means coupled to each of the multiple requesters for generating pointer signals indicative of a selected one of the multiple requesters requesting a selected one of the request addresses;

    pointer queue means coupled to the first memory and to said pointer generation means for storing said pointer signals indicative of ones of the multiple requesters requesting non-resident request addresses; and

    queue priority means coupled to said pointer queue means and to the memory priority logic for selecting from said pointer queue means predetermined ones of said stored pointer signals, and for providing said pointer signals to the memory priority logic, whereby the memory priority logic provides to the second memory a non-resident request address from one of the multiple requesters as indicated by said selected ones of said stored pointer signals.

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