Semiconductor integrated circuit processing wafer having a PECVD material layer of improved thickness uniformity
First Claim
1. A semiconductor integrated circuit processing wafer, comprising:
- a substrate;
a PECVD layer on said substrate;
said PECVD layer comprising plural PECVD sub-layers; and
said plural sub-layers having compensating profiles of non-uniform as-deposited thicknesses across at least a substantial portion of said substrate, said compensating profiles are additive to result in said PECVD layer having a generally uniform as-deposited thickness across said at least a substantial portion of said substrate.
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Accused Products
Abstract
A semiconductor integrated circuit is made by a process including the formation on a surface of a semiconductor integrated circuit processing wafer of a layer of material applied to the wafer by plasma enhanced chemical vapor deposition (PECVD). The layer of material may include plural sub-layers, the thicknesses of which are additive to result in the thickness of the layer of material itself. The sub-layers of material may have non-uniform thicknesses across a dimension of the processing wafer because of compromises in the process which are necessary to control various parameters of the material layer other than its thickness. These non-uniformities of thickness of the sub-layers may be controlled to offset one another so that the resulting layer of material has a substantially uniform thickness across the dimension of the processing wafer. A method, and apparatus for practicing the method, are set forth along with an explanation of how particular geometric factors of electrodes used in the PECVD process affect the resulting thickness non-uniformities. The thickness non-uniformities of the sub-layers may also be largely abated by use of the invention in a predictive-corrective fashion. A similar predictive-corrective method and resulting apparatus is set forth for gas plasma etching of an existing layer of material on a semiconductor integrated circuit processing wafer.
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Citations
14 Claims
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1. A semiconductor integrated circuit processing wafer, comprising:
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a substrate; a PECVD layer on said substrate; said PECVD layer comprising plural PECVD sub-layers; and said plural sub-layers having compensating profiles of non-uniform as-deposited thicknesses across at least a substantial portion of said substrate, said compensating profiles are additive to result in said PECVD layer having a generally uniform as-deposited thickness across said at least a substantial portion of said substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification