Digital variable symbol timing recovery system for QAM
First Claim
1. In a receiver receiving a transmitted quadrature amplitude modulated (QAM) signal representing successive symbols, the QAM signal including an in-phase (I) component and a quadrature component (Q), a timing recovery system comprising:
- a source of samples representing the QAM signal at a fixed frequency;
processing circuitry for the I component, comprising;
a first demodulator, coupled to the sample source, for demodulating the I component of the QAM signal to baseband; and
a first interpolator, coupled to the first demodulator and responsive to a control signal, for producing I component samples taken at times synchronized to the transmitted symbols;
processing circuitry for the Q component, comprising;
a second demodulator, coupled to the sample source, for demodulating the Q component of the QAM signal to baseband; and
a second interpolator, coupled to the second demodulator and responsive to a control signal, for producing Q component samples taken at times synchronized to the transmitted symbols;
a phase error detector, coupled to the first and the second interpolators, for detecting a phase error between the sample times of the transmitter synchronized I and Q samples respectively produced by the first and second interpolators and times of the successive transmitter symbols;
a source of a nominal delay signal;
a summer coupled to the phase error detector and the nominal delay signal source; and
a numerically controlled delay circuit, coupled to the summer, for producing the respective control signals coupled to the first and second interpolators.
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Accused Products
Abstract
A receiver is arranged for receiving a transmitted quadrature amplitude modulated (QAM) signal representing successive symbols, and including an in-phase (I) component and a quadrature (Q) component. In such a receiver, a timing recovery system includes a source of samples representing the QAM signal produced at a fixed frequency. A first chain of processing circuitry for the I component includes a first demodulator, coupled to the sample source, for demodulating the I component of the QAM signal to baseband; and a first interpolator, coupled to the first demodulator and responsive to a control signal, for producing I component samples taken at times synchronized to the transmitted symbols. A second chain of processing circuitry for the Q component includes a second demodulator, also coupled to the sample source, for demodulating the Q component of the QAM signal to baseband; and a second interpolator, coupled to the second demodulator and responsive to a control signal, for producing Q component samples taken at times synchronized to the transmitted symbols. A phase error detector is coupled to the first and the second interpolators, and detects the phase error between the sample times of the I and Q component samples from the first and second interpolators and times of the successive transmitter symbols. A summer is coupled to the phase error detector and a source of a nominal delay signal. A numerically controlled delay circuit, is coupled to the summer, for producing the respective control signals for the first and second interpolators.
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Citations
11 Claims
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1. In a receiver receiving a transmitted quadrature amplitude modulated (QAM) signal representing successive symbols, the QAM signal including an in-phase (I) component and a quadrature component (Q), a timing recovery system comprising:
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a source of samples representing the QAM signal at a fixed frequency; processing circuitry for the I component, comprising; a first demodulator, coupled to the sample source, for demodulating the I component of the QAM signal to baseband; and a first interpolator, coupled to the first demodulator and responsive to a control signal, for producing I component samples taken at times synchronized to the transmitted symbols; processing circuitry for the Q component, comprising; a second demodulator, coupled to the sample source, for demodulating the Q component of the QAM signal to baseband; and a second interpolator, coupled to the second demodulator and responsive to a control signal, for producing Q component samples taken at times synchronized to the transmitted symbols; a phase error detector, coupled to the first and the second interpolators, for detecting a phase error between the sample times of the transmitter synchronized I and Q samples respectively produced by the first and second interpolators and times of the successive transmitter symbols; a source of a nominal delay signal; a summer coupled to the phase error detector and the nominal delay signal source; and a numerically controlled delay circuit, coupled to the summer, for producing the respective control signals coupled to the first and second interpolators. - View Dependent Claims (2, 3, 4, 5, 6)
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7. In a receiver receiving a transmitted quadrature amplitude modulated (QAM) signal representing successive symbols, the QAM signal including an in-phase (I) component and a quadrature component (Q) modulated on a QAM subcarrier, a timing recovery system comprising:
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a source of samples representing the QAM signal at a fixed frequency; an interpolator, coupled to the sample source, and responsive to a control signal, for producing QAM samples taken at times synchronized to the QAM subcarrier; a first demodulator, coupled to the interpolator, for demodulating the I component of the QAM signal to baseband; a second demodulator, coupled to the interpolator, for demodulating the Q component of the QAM signal to baseband; a phase error detector, coupled to the first and the second demodulators, for detecting a phase error between the sample times of the transmitter synchronized I and Q samples respectively produced by the first and second demodulators and times of the successive transmitter symbols; a source of a nominal delay signal; a summer coupled to the phase error detector and the nominal delay signal source; and a numerically controlled delay circuit, coupled to the summer, for producing the control signal coupled to the interpolator. - View Dependent Claims (8, 9, 10, 11)
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Specification