Method for producing semiconductor device

• US 5,880,038 A
• Filed: 03/07/1996
• Issued: 03/09/1999
• Est. Priority Date: 03/07/1995
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Konuma, Toshimitsu, Takemura, Yasuhiko, Yamazaki, Shunpei
• Primary Examiner(s): POWELL, WILLIAM A
• Application Number:
  US08/612,191
• Time in Patent Office: 1,097 Days
• Field of Search: 156/643.1, 156/644.1, 156/657.1, 156/659.11, 216/56, 216/101, 438/743, 438/756, 438/694, 437/40, 437/187, 437/194, 437/235
• US Class Current: 438/756
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02194 the material containing more than one metal element
• CPC Class Codes: H01L 21/02203 the layer being porous
• CPC Class Codes: H01L 21/02244 of a metallic layer
• CPC Class Codes: H01L 21/02258 formation by anodic treatment, e.g. anodic oxidation
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/3167 of anodic oxidation
• CPC Class Codes: H01L 21/31683 of metallic layers, e.g. Al deposited on the body, e.g. formation of multi-layer insulating structures
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate

Abstract

After a resist mask is selectivity formed on an upper portion of a gate electrode containing mainly aluminum. At this state an anodization process is performed using an electrolytic solution, to form an anodic oxide film in a region other than a region of the upper portion on which the resist mask is formed. A silicon oxide film is formed to cover the gate electrode or the like Since an anodic oxide film is not formed on the region of the upper portion, contact holes for a wiring or an electrode made of aluminum are formed by etching the silicon oxide film using a hydrofluoric acid system etchant.

Claims

1. A method for producing a semiconductor device comprising the steps of:

forming a wiring or an electrode comprising an anodizable material;

selectively forming a mask on only a portion of the wiring or the electrode;

forming an anodic oxide film on a surface of the wiring or the electrode other than the portion on which the mask is formed, by anodizing the wiring or the electrode;

forming an interlayer insulating film comprising silicon oxide to cover the wiring or the electrode after the forming of said anodic oxide film; and

forming a contact hole through said interlayer insulating film by etching with an etchant including hydrofluoric acid whereby said portion of the wiring or the electrode is exposed within said contact hole.

2. The method of claim 1 wherein said etchant is added with at least one acetic acid and a surface-active agent.

12. A method according to claim 1 wherein said anodizable material is aluminum.

13. A method according to claim 1 further comprising a step of forming a second wiring on said interlayer insulating film so as to be electrically connected to said electrode or the wiring through said contact hole.

14. A method according to claim 1 wherein said anodizable material is aluminum.

3. A method for producing a semiconductor device comprising the steps of:

forming an insulating film on a semiconductor;

forming a wiring or an electrode comprising an anodizable material on the insulating film;

selectively forming a mask on only a portion of the wiring or the electrode leaving another portion without said mask thereon;

forming an anodic oxide film on said another portion of the wiring or the electrode other than the portion on which the mask is formed, by anodizing another portion of the wiring or the electrode;

removing the mask after the anodizing step to expose said portion of the wiring or the electrode;

forming another insulating film to cover the wiring or the electrode after the removing step; and

simultaneously forming a first contact hole for the semiconductor and a second contact hole for the wiring or the electrode through said another insulating film, wherein said portion of the wiring or the electrode is exposed within said second contact hole.

4. A method for producing a semiconductor device comprising the steps of:

forming a gate insulating film on a semiconductor region;

forming a gate electrode comprising aluminum on the gate insulating film;

forming a mask on a portion of an upper surface of the gate electrode;

anodizing the gate electrode to form an anodic oxide layer around the gate electrode;

removing the mask after the anodizing step;

forming source and drain regions in the semiconductor region;

forming an insulating film to cover the gate electrode and the semiconductor region; and

forming contact holes for the source and drain regions and a contact hole for the gate electrode by etching using a desired etchant.

5. The method of claim 4 wherein the anodic oxide layer is formed on a surface of the gate electrode other than the portion of the upper surface of the gate electrode.

6. The method of claim 4 wherein the portion of the upper surface of the gate electrode is in contact with the insulating film.

7. The method of claim 4 wherein the contact hole for the gate electrode is formed in the portion of the upper surface of the gate electrode.

8. A method for producing a semiconductor device comprising the steps of:

forming a gate insulating film on a semiconductor region;

forming a gate electrode comprising aluminum on the gate insulating film;

anodizing the gate electrode to form a first anodic oxide layer on an upper surface of the gate electrode;

anodizing the gate electrode to form a second anodic oxide layer on side surfaces of the gate electrode after the anodizing step;

forming source and drain regions in the semiconductor region using the gate electrode and the second anodic oxide layer as masks;

removing the second anodic oxide layer and a portion of the first anodic oxide layer after forming the source and drain regions;

forming a mask on a portion of a surface of the first anodic oxide layer after the removing step;

anodizing the gate electrode to form a third anodic oxide layer around the gate electrode;

removing the mask after forming the third anodic oxide layer;

forming lightly doped drain regions using the gate electrode and the third anodic oxide film as masks;

forming an insulating film to cover the gate electrode and the gate insulating film; and

forming contact holes for the source and drain regions and a contact hole for the gate electrode by etching using a desired etchant.

9. The method of claim 8 wherein the third anodic oxide layer is formed on a surface of the gate electrode other than a portion of an upper surface of the gate electrode.

11. The method of claim 8 wherein the contact hole for the gate electrode is formed in a portion of an upper surface of the gate electrode.

10. A method for producing a semiconductor device comprising the steps of:

forming a gate insulating film on a semiconductor region;

forming a gate electrode comprising aluminum on the gate insulating film;

forming a mask on only a portion of an upper surface of the gate electrode;

anodizing the gate electrode to form an anodic oxide layer around the gate electrode;

removing the mask after the anodizing step;

forming source and drain regions in the semiconductor region;

forming an insulating film to cover the gate electrode and the semiconductor region; and

forming contact holes for the source and drain regions and a contact hole for the gate electrode by etching using a desired etchant.

15. A method of manufacturing a semiconductor device comprising:

forming a semiconductor layer over a substrate;

forming a gate insulating film on said semiconductor layer;

forming a conductive film comprising an anodizable material over said semiconductor layer and said gate insulating film;

patterning said conductive film into a gate electrode by using a first mask, said gate electrode being located over said semiconductor layer with said gate insulating film interposed therebetween;

anodically oxidizing only side surfaces of said gate electrode by using said first mask in order to form a first anodic oxide film adjacent to sidewalls of said gate electrode wherein said first anodic oxide film is used to define source and drain regions within said semiconductor layer;

forming a second mask on only a selected portion of said gate electrode after the formation of said first anodic oxide film;

anodically oxidizing surfaces of said gate electrode to form a second anodic oxide film, wherein said selected portion is prevented from being oxidized by said second mask;

forming an interlayer insulating film over said semiconductor layer and said gate electrode after the forming of said second anodic oxide film;

forming at least one contact hole through said interlayer insulating film in correspondence with said selected portion of the gate electrode; and

forming a wiring on said interlayer insulating film, said wiring electrically connected to said selected portion of the gate electrode through said contact hole.

16. A method according to claim 15 wherein said anodizable material is aluminum.

17. A method according to claim 15 further comprising introducing impurity ions into said semiconductor layer to form said source and drain regions in a self-aligning manner with respect to said first anodic oxide film.

18. A method according to claim 15 wherein said first anodic oxide film is removed before the forming of said second anodic oxide film.

19. A method according to claim 15 further comprising introducing impurity ions into said semiconductor layer with said second anodic oxide film and the gate electrode used as a mask.

20. A method of manufacturing a semiconductor device comprising:

forming a semiconductor layer over a substrate;

forming a gate insulating film on said semiconductor layer;

forming a conductive film comprising an anodizable material over said semiconductor layer and said gate insulating film;

oxidizing an entire upper surface of said conductive film to form an oxide insulating film;

forming a first mask on said oxide insulating film;

patterning said conductive film into a gate electrode by using said first mask, said gate electrode being located over said semiconductor layer with said gate insulating film interposed therebetween;

anodically oxidizing only side surfaces of said gate electrode by using said first mask in order to form a first anodic oxide film adjacent to sidewalls of said gate electrode wherein said first anodic oxide film is used to define source and drain regions within said semiconductor layer;

forming a second mask on only a selected portion of said gate electrode after the formation of said first anodic oxide film;

anodically oxidizing surfaces of said gate electrode to form a second anodic oxide film, wherein said selected portion is prevented from being oxidized by said second mask;

forming an interlayer insulating film over said semiconductor layer and said gate electrode after the formation of said second anodic oxide film;

forming at least one contact hole through said interlayer insulating film and said oxide insulating film to expose said selected portion of the gate electrode; and

forming a wiring on said interlayer insulating film, said wiring electrically connected to said selected portion of the gate electrode through said contact hole.

21. A method according to claim 20 wherein said oxide insulating film is formed by anodically oxidizing the upper surface of said conductive film.

22. A method according to claim 21 wherein said oxide insulating film is between 100 and 150 Å

thick.

23. A method according to claim 21 wherein said anodizable material is aluminum.