Electrical circuit arrangement having equipotential surface for reduced high-frequency interference

• US 5,880,937 A
• Filed: 03/06/1997
• Issued: 03/09/1999
• Est. Priority Date: 03/08/1996
• Status: Expired due to Term

• Current Assignee: Patent-Treuhand-Gesellschaft Fur Elektrische Gluhlampen mbH (Ams-Osram AG)
• Original Assignee: Patent-Treuhand-Gesellschaft Fuer Elektrische Gluehlampen MbH (Siemens AG)
• Inventors: Baggio, Stefano, Schadhauser, Klaus
• Primary Examiner(s): SPARKS, DONALD ALAN
• Application Number:
  US08/811,794
• Time in Patent Office: 733 Days
• Field of Search: 174/35 R, 174/267, 174/35 GC, 174/266, 174/51, 174/265, 174/255, 174/264, 174/260, 174/262, 174/261, 174/263, 257/659, 257/660, 257/723, 257/724, 257/691, 257/728, 307/66, 307/90, 307/89, 307/91, 333/246, 333/247, 333/180, 333/181, 333/182, 333/184, 333/185, 361/760, 361/777, 361/780, 361/783, 361/775, 361/816, 361/818, 361/212, 361/220, 361/782, 361/753, 361/794, 361/799, 361/800, 439/108, 439/109, 439/607, 439/609
• US Class Current: 361/794
• CPC Class Codes: H05B 41/28 using static converters
• CPC Class Codes: H05B 41/2851 for protecting the circuit against abnormal operating conditions
• CPC Class Codes: H05K 1/0218 by printed shielding conductors, ground planes or power plane H05K1/0236 takes precedence
• CPC Class Codes: H05K 1/0254 High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection electrostatic discharge protection for electric apparatus in general H05K9/0067, H05K9/0079; Arrangements for regulating voltages or for using plural voltages
• CPC Class Codes: H05K 9/0039 Galvanic coupling of ground layer on printed circuit board [PCB] to conductive casing printed shielding conductors, ground planes or power planes for reduction of cross-talk or noise in printed circuits H05K1/0218

Abstract

A circuit arrangement (4) for the operation of electrical lamps, with a printed circuit board (5), on which electrical components (14) and conductor strips (7; 19; 20) are arranged, whereby potential changes that are rapid over time occur on printed circuit board (5), has an equipotential surface (6) for reducing the radio interference caused by these potential changes. For this purpose, equipotential surface (6) with resting potential relative to the rapid potential changes is connected onto printed circuit board (5). In particular, the equipotential surface is produced by a copper layer (6) on the upper side of printed circuit board (5). The advantage is a simple-to-produce arrangement that can be automated for reducing radio interference.

Claims

1. An electrical circuit arrangement (4) with a printed circuit board (5;

22) for the operation of electrical lamps, on which printed circuit board (5), electrical components (14) and conductor strips (7;

19;

     20) are arranged, whereby potential changes that are rapid over time occur on printed circuit board (5;

     22), as well as with an equipotential surface (6;

     23) for reducing the radio interference caused by these potential changes, is hereby characterized in that equipotential surface (6;

     23) is connected with a resting potential (7;

     29) relative to the rapid potential changes on printed circuit board (5;

     22), the equipotential surface (6;

     23) is arranged at least in the vicinity of the upper side or lower side of printed circuit board (5;

     22), the equipotential surface (6) is joined with a ground conductor strip (7) arranged on the under side of printed circuit board (5) by means of a solder or wire bridge (8) via a hole (9) in printed circuit board (5).

2. The circuit arrangement according to claim 1, further characterized in that equipotential surface (6) at least partially covers the upper side of printed circuit board (5), whereby those regions (13) on the upper side are spared, in which terminals (15, 16) of components (14) are guided through printed circuit board (5) to conductor strips (19;

20) arranged on the under side of the printed circuit board.

3. The circuit arrangement according to claim 1, further characterized in that the equipotential surface is comprised of a layer (6) or plate (3) of electrically good conducting material.

4. The circuit arrangement according to claim 3, further characterized in that the plate occupies roughly the surface of the printed circuit board.

5. The circuit arrangement according to claim 4, further characterized in that the plate is essentially arranged parallel to the printed circuit board.

6. The circuit arrangement according to claim 3, further characterized in that the equipotential surface comprises two or more partial surfaces.

7. The circuit arrangement according to claim 3, further characterized in that the material comprises metal, particularly copper.

8. The circuit arrangement according to claim 3, further characterized in that the material comprises an electrically conducting plastic.

9. The circuit arrangement according to claim 1, further characterized in that

the circuit arrangement has a wire bridge (25), whose first end (26) is connected with resting potential (29) and whose second end (30) is bent over one edge of printed circuit board (22);

and

printed circuit board (22) is arranged inside a circuit housing (21) in such a way that the bent part of second end (30) of wire bridge (25) contacts equipotential surface (6) in a reliable electrically conducting manner.

10. The circuit arrangement according to claim 9, further characterized in that the edge of printed circuit board (22) has an opening (31) and the bent part of second end (30) of wire bridge (25) is partially embedded in this opening (31).

11. The circuit arrangement according to claim 10, further characterized in that opening (31) has the shape of a partial circle.

12. The circuit arrangement according to claim 9, further characterized in that the bent second end (30) of wire bridge (25) is attached onto printed circuit board (22) by means of "half" solder point (32) in the region of opening (31).

13. The circuit arrangement according to claim 9, further characterized in that circuit housing (21) is comprised of electrical nonconducting material and equipotential surface (23) between printed circuit board (22) and the bent part of second end (30) of wire bridge (25), as well as the inner walls of housing (21), whereby the inner walls press the equipotential surface (23) against the bent second end (30) of wire bridge (25), and in this way the electrical contact between equipotential surface (23) and wire bridge (25) is assured.

14. The circuit arrangement according to claim 13, further characterized in that, in addition, an insulating layer (24) is arranged between equipotential surface (23) and printed circuit board (22).

15. The circuit arrangement according to claim 14, further characterized in that the insulating layer extends over the entire equipotential surface and that insulating layer and equipotential surface are bordered in the region of the bent part of the second end of the wire bridge such that the side of the equipotential surface turned away from the insulating surface contacts the bent part of the second end of the wire bridge in an electrically conducting manner, due to this border.

16. The circuit arrangement according to claim 13, further characterized in that the equipotential surface is comprised of a metal foil (23).

17. The circuit arrangement according to claim 1, further characterized in that the circuit housing comprises electrically conducting material, which circuit housing itself comprises the equipotential surface.

18. The circuit arrangement according to claim 1, further characterized in that a ground conductor strip (29) of the circuit arrangement is used as the resting potential relative to the rapid potential changes.