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Method and apparatus for reading/writing data in a memory system including programmable resistors

  • US 5,883,827 A
  • Filed: 08/26/1996
  • Issued: 03/16/1999
  • Est. Priority Date: 08/26/1996
  • Status: Expired due to Term
First Claim
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1. A memory system comprising:

  • an array of programmable resistance elements, each of which being programmable to one of a first resistance state and a second resistance state, wherein said programmable resistance elements are arranged in a plurality of columns and rows in said array;

    a comparison circuit coupled to said array of programmable resistance elements, said comparison circuit adapted to compare sense signals developed by said programmable resistance elements and reference signals, and to generate read-out signals in response to said comparisons;

    a plurality of column lines respectively coupled to pluralities of programmable resistance elements arranged in said columns;

    a plurality of row lines respectively coupled to pluralities of programmable resistance elements arranged in said rows;

    a column decoder circuit coupled to select one of said column lines; and

    a row decoder circuit coupled to select one of said row lines, thereby selecting one of said programmable resistance elements coupled to said selected column line and said selected row line.

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