Per-packet jamming in a multi-port bridge for a local area network

• US 5,884,040 A
• Filed: 10/08/1997
• Issued: 03/16/1999
• Est. Priority Date: 01/11/1995
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.), Sony Electronics Inc. (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.), Sony Electronics Inc. (Sony Group Corp.)
• Inventors: Chung, David H.
• Primary Examiner(s): Lim, Krisna
• Application Number:
  US08/946,866
• Time in Patent Office: 524 Days
• Field of Search: 395/200.57, 395/200.68, 370/401, 370/402, 370/404
• US Class Current: 709/227
• CPC Class Codes: C11D 1/123 derived from carboxylic acids, e.g. sulfosuccinates
• CPC Class Codes: C11D 1/72 Ethers of polyoxyalkylene glycols
• CPC Class Codes: C11D 2111/12 Soft surfaces, e.g. textile
• CPC Class Codes: H04L 12/18 for broadcast or conference , e.g. multicast
• CPC Class Codes: H04L 12/40143 involving priority mechanisms hybrid switching fabrics H04L12/6402; intermediate storage or scheduling H04L49/90; time-division multiplex systems H04J3/00
• CPC Class Codes: H04L 12/413 with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD]
• CPC Class Codes: H04L 12/462 LAN interconnection over a bridge based backbone
• CPC Class Codes: H04L 45/7453 using hashing
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/135 by jamming the transmission media
• CPC Class Codes: H04L 47/30 in combination with information about buffer occupancy at either end or at transit nodes
• CPC Class Codes: H04L 49/102 using shared medium, e.g. bus or ring
• CPC Class Codes: H04L 49/351 for local area network [LAN], e.g. Ethernet switches
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers
• CPC Class Codes: H04L 49/9063 Intermediate storage in different physical parts of a node or terminal
• CPC Class Codes: H04L 49/9073 Early interruption upon arrival of a fraction of a packet
• CPC Class Codes: H04L 49/9089 replacing packets in a storage arrangement, e.g. pushout

Abstract

A technique for controlling the flow of packets in a multi-port bridge according to availability of resources within the bridge. The bridge includes a memory for storing packets and a plurality of ports. Each port includes a receive buffer, a transmit buffer and a memory pointer buffer. A data packet is received by the receive buffer of a port. As the packet is still being received, a look-up table is utilized to determine which is the appropriate destination port for the packet. If the memory pointer buffer in the destination port is nearly full, the destination port generates a jam request. The source port receives the jam request and, in response, discards the incoming packet and sends a jam signal. Otherwise, the memory pointer is stored in the destination port until the packet can be retrieved from the memory for transmission by the destination port. Because packets are not stored in the ports, the receive buffer and the transmit buffer will not become full and, thus, need not be checked to determine whether to transmit a jam signal. Instead, only the memory pointer buffer in the destination port for a packet need to checked to determine whether to transmit a jam signal.

Claims

1. A multi-port bridge for interconnecting a plurality of segments of a local area network, the multi-port bridge comprising:

a. a source port for receiving a packet to be bridged by the multi-port bridge;

b. a control circuit coupled to the source port, the control circuit for assigning a location within a memory device to the packet; and

c. a destination port coupled to the source port, the destination port for transmitting the packet to a destination node, wherein the destination port includes a memory pointer buffer for storing an indicia of the location assigned to the packet, wherein a jam request is transmitted by the destination port in response to an amount of space available in the memory pointer buffer being less than a predetermined amount.

2. The multi-port bridge according to claim 1 wherein, in response to the jam request, the source port sends a jam signal thereby causing a source node to discontinue transmitting the packet.

3. The multi-port bridge according to claim 1 wherein the source port comprises a receive buffer for receiving the packet.

4. The multi-port bridge according to claim 3 wherein the receive buffer is a first-in-first-out buffer.

5. The multi-port bridge according to claim 4 wherein the packet has a maximum expected size and the receive buffer is smaller than the maximum expected size.

6. The multi-port bridge according to claim 1 wherein the destination port further comprises a transmit buffer for transmitting the packet.

7. The multi-port bridge according to claim 6 wherein the transmit buffer is a first-in-first-out buffer.

8. The multi-port bridge according to claim 7 wherein the packet has a maximum expected size and the transmit buffer is smaller than the maximum expected size.

9. The multi-port bridge according to claim 1 wherein the indica includes a first field for identifying the source port, a second field for identifying the destination port, and a third field for identifying a starting address assigned to the packet in the memory device.

10. A multi-port bridge for interconnecting a plurality of segments of a local area network, the multi-port bridge comprising:

a. a switch engine for controlling bridging of packets to be bridged by the multi-port bridge;

b. a memory device coupled to the switch engine for temporarily storing the packets wherein each stored packet corresponds to a location within the memory device; and

c. a plurality of ports, each port coupled to the memory device and to a respective one of the plurality of segments of the local area network, wherein each port includes a memory pointer buffer for storing indica of the location within the memory device for each stored packet to be transmitted by the port and wherein a jam signal is transmitted by the multi-port bridge in response to an amount of free space available in the memory pointer buffer.

11. The multi-port bridge according to claim 10 wherein each port comprises a receive buffer for receiving packets from the respective one of the plurality of segments.

12. The multi-port bridge according to claim 11 wherein the receive buffer is a first-in-first-out buffer.

13. The multi-port bridge according to claim 12 wherein the packets have a maximum expected size and the receive buffer is smaller than the maximum expected size.

14. The multi-port bridge according to claim 10 wherein each port further comprises a transmit buffer for transmitting packets to the respective one of the plurality of segments.

15. The multi-port bridge according to claim 14 wherein the transmit buffer is a first-in-first-out buffer.

16. The multi-port bridge according to claim 15 wherein the packet has a maximum expected size and the transmit buffer is smaller than the maximum expected size.

17. The multi-port bridge according to claim 10 wherein the indica includes a first field for identifying the source port, a second field for identifying the destination port, and a third field for identifying a starting address assigned to the packet in the memory device.

18. A method of controlling flow of packets in a multi-port bridge having a plurality of ports, the multi-port bridge for interconnecting a plurality of segments of a local area network, the method comprising steps of:

a. receiving a destination address for a packet in a source port;

b. determining a destination port for the packet based upon the destination address;

c. assigning a location in a memory device to the packet;

d. forming indicia of the location;

e. determining whether the destination port is available to receive the indicia; and

f. if the destination port is available to receive the indicia, receiving the indicia in the destination port, otherwise, sending a jam signal to a segment associated with the source port.

19. The method according to claim 18 wherein the indica includes a first field for identifying the source port, a second field for identifying the destination port, and a third field for identifying a starting address assigned to the packet in the memory device.

20. The method according to claim 18 wherein the indica includes an identification assigned to the packet and a starting address assigned to the packet in the memory device.

21. The method according to claim 18 further comprising a step of loading the packet into the location.

22. The method according to claim 21 wherein the step of loading is performed while the packet is being received by the source port.

23. The method according to claim 21 further comprising steps of:

a. storing the indicia in the destination port if the destination port is available to receive the indicia;

b. receiving the packet in the destination port from the location; and

c. transmitting the packet while the packet is being received from the location.

24. A method of controlling flow of packets in a multi-port bridge having a plurality of ports interconnected to a memory device by a communication bus, the multi-port bridge for interconnecting a plurality of segments of a local area network, the method comprising steps of:

a. receiving a packet into a receive buffer in a source port for the packet, the packet having a destination address, a source address and a data field and the packet being received from a segment associated with the source port;

b. looking-up the destination address in a table for determining a destination port for the packet;

c. assigning a location in the memory device to the packet;

d. forming a triplet for the packet wherein the triplet includes a first field for identifying the source port, a second field for identifying the destination port, and a third field for identifying a starting address assigned to the packet in the memory device;

e. placing the triplet on the communication bus a first time;

f. determining whether the destination port is available to receive the indicia; and

g. if the destination port is not available to receive the indica, performing steps of;

(1) placing a jam request on the communication bus; and

(2) sending a jam signal to the segment associated with the source port in response to the jam request;

h. if the destination port is available to receive the indica, performing steps of;

(1) loading the packet into the memory device at the location in the memory device assigned to the packet;

(2) placing the triplet on the communication bus a second time;

(3) receiving the triplet into a triplet buffer in the destination port;

(4) receiving the packet into a transmit buffer in the destination port from the location in the memory device; and

(5) transmitting the packet to a segment associated with the destination port for the packet.

25. The method according to claim 24 wherein the step of looking-up the destination address is performed while the data field is being received by the source port.

26. The method according to claim 24 wherein the step of sending the jam signal is performed while the data field is being received by the source port.

27. The method according to claim 24 wherein the step of loading the packet into the memory device is performed while the data field is being received by the source port.

28. The method according to claim 24 wherein the step of transmitting the packet is performed while the data field is being received from the memory device by the destination port.

29. A method of controlling flow of packets in a multi-port bridge having a plurality of ports interconnected to a memory device by a communication bus, the multi-port bridge for interconnecting a plurality of segments of a local area network, the method comprising steps of:

a. receiving a packet into a receive buffer in a source port for the packet, the packet having a destination address, a source address and a data field and the packet being received from a segment associated with the source port;

b. looking-up the destination address in a table for determining one or more destination ports for the packet;

c. assigning a location in the memory device to the packet;

d. forming a bit-map for the packet wherein each of the plurality of ports is assigned a respective one signal line of the communication bus, the bit-map including a logic level for each signal line assigned to a port wherein the logic level is indicative of whether the respective port is a destination port for the packet;

e. placing the bit-map on the communication bus;

f. determining whether the destination port is available to receive indicia of the memory location assigned to the packet; and

g. if the destination port is not available to receive the indicia, performing steps of;

(1) placing a jam request on the communication bus; and

(2) sending a jam signal to the segment associated with the source port in response to the jam request;

h. if the destination port is available to receive the indicia, performing steps of;

(1) loading the packet into the memory device at the location in the memory device assigned to the packet;

(2) placing the indicia on the communication bus;

(3) receiving the indicia into a buffer in the destination port;

(4) receiving the packet into a transmit buffer in the destination port from the location in the memory device; and

(5) transmitting the packet to a segment associated with the destination port for the packet.

30. The method according to claim 29 wherein the step of looking-up the destination address is performed while the data field is being received by the source port.

31. The method according to claim 29 wherein the step of sending the jam signal is performed while the data field is being received by the source port.

32. The method according to claim 29 wherein the step of loading the packet into the memory device is performed while the data field is being received by the source port.

33. The method according to claim 29 wherein the step of transmitting the packet is performed while the data field is being received from the memory device by the destination port.