Multiple output voltages from a cascaded buck converter topology

• US 5,886,508 A
• Filed: 08/29/1997
• Issued: 03/23/1999
• Est. Priority Date: 08/29/1997
• Status: Expired due to Term

• Current Assignee: Artesyn Technologies Incorporated (Artesyn Embedded Technologies, Inc.)
• Original Assignee: Computer Products, Inc. (Artesyn Embedded Technologies, Inc.)
• Inventors: Jutras, Mark A.
• Primary Examiner(s): STERRETT, JEFFREY L
• Application Number:
  US08/920,678
• Time in Patent Office: 571 Days
• Field of Search: 323/222, 323/267, 323/271, 323/282, 363/20, 363/21
• US Class Current: 323/267
• CPC Class Codes: G05F 1/577 for plural loads
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 3/33561 having more than one ouput with independent control

Abstract

A buck converter in accordance with the present invention provides multiple, well regulated, low voltage outputs. A cascaded buck converter comprises a main buck converter that is coupled to a subordinate buck converter through a cascade transistor in series with the free wheeling diode or transistor. The main buck converter is coupled to the free wheeling diode through the cascade transistor. Additional voltage outputs are possible by placing additional subordinate buck converters in series with the cascade transistor.

An isolated forward converter with multiple output voltages in accordance with the present invention may be derived using the cascaded buck converter topology. The cascading configuration permits multiple voltage outputs using a minimum number of switching devices while avoiding undesirable cross regulation.

Claims

1. A circuit comprising:

an input voltage terminal;

a first transistor having an input lead coupled to said input voltage terminal, a control lead, and an output lead coupled to a first node, said first transistor switchable to connect said input lead and said output lead in an on state and disconnect said input lead and said output lead in an off state;

a first inductive element disposed between said first node and a first output terminal;

a second transistor having an input lead coupled to said first node, a control lead, and an output lead coupled to a second node, said first transistor switchable to connect said input lead and said output lead in an on state and disconnect said input lead and said output lead in an off state;

a second inductive element disposed between said second node and a second output terminal;

a first current control device coupled between said second node and a common node, wherein current between said common node and said first inductive element is conducted through said first current control device when said first transistor is in said off state and current between said common node and said second inductive element is conducted through said first current control device when said second transistor is in said off state; and

a control circuit coupled to said control lead of said first transistor and to said control lead of said second transistor, wherein said control circuit turns said first and second transistors on and off.

2. Circuit of claim 1, further comprising:

a first capacitive element having a first lead and a second lead, said first lead coupled to said first output lead, said second lead coupled to said common node; and

a second capacitive element having a first lead and a second lead, said first lead coupled to said second output lead, said second lead coupled to said circuit common.

3. Circuit of claim 1, wherein current between said common node and said second inductive element is conducted through said first current control device when said first transistor is in an off state.

4. Circuit of claim 1, wherein said first current control device is a diode.

5. Circuit of claim 1, wherein said first current control device is a third transistor having an input lead coupled to said second node, a control lead coupled to said control circuit, and an output lead coupled to said common node, said third transistor switchable to connect said input lead and said output lead in an on state and disconnect said input lead and said output lead in an off state, wherein said third transistor is in an off state only when said first transistor is in said on state and said second transistor is in said on state.

6. Circuit of claim 1, further comprising a transforming element disposed between said first transistor and said first node, said transforming element having a primary winding and a secondary winding.

7. Circuit of claim 6, further comprising a second current control device disposed between said transforming element and said first node, wherein said second current control device conducts current when said first transistor is in said on state.

8. Circuit of claim 7, wherein said second current control device is a diode disposed between said secondary winding and said first node.

9. Circuit of claim 6, further comprising a second current control device disposed between said secondary winding and said common node, wherein said second current control device conducts current when said first transistor is in said on state.

10. Circuit of claim 9, wherein said second current control device is a third transistor having an input lead coupled to said circuit common, a control lead coupled to said first node, and an output lead coupled to said transforming element, said third transistor switchable to connect said input lead and said output lead in an on state and disconnect said input lead and said output lead in an off state.

11. A method of producing DC voltages, said method comprising;

turning on a first transistor to couple a first inductive element to an input voltage;

turning off a second transistor to permit a current carrying device to couple a second inductive element to a common node;

turning on said second transistor while said first transistor is on to couple said second inductive element to said input voltage;

turning off said first transistor to permit said current carrying device to couple said first inductive element to said common node; and

controlling said first and said second transistors to produce a first regulated DC voltage across a first load coupled to said first inductive element, and to produce a second regulated DC voltage across a second load coupled to said second inductive element.

12. Method of claim 11, further comprising turning on a third transistor when said first transistor or said second transistor is off to couple said first inductive element and said second inductive element to said common node.

13. A method of producing DC voltages, said method comprising:

turning on a first transistor to charge a first inductive element with an input voltage;

turning off a second transistor to discharge a second inductive element;

turning on said second transistor while said first transistor is on to charge said second inductive element with said input voltage;

turning off said first transistor while said second transistor remains on to discharge said first inductive element and said second inductive element; and

controlling said first and said second transistors to produce a first regulated DC voltage across a first load coupled to said first inductive element, and to produce a second regulated DC voltage across a second load coupled to said second inductive element.

14. Method of claim 13, further comprising turning on a third transistor when said first transistor or said second transistor is off to discharge said first inductive element and said second inductive element, said third transistor is disposed between said second transistor and a common node.