Driver circuit for driving liquid-crystal display

• US 5,886,679 A
• Filed: 03/25/1996
• Issued: 03/23/1999
• Est. Priority Date: 03/23/1995
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Corporation
• Inventors: Matsuda, Kohei, Saitoh, Sei
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): Duong, Tai V.
• Application Number:
  US08/621,477
• Time in Patent Office: 1,093 Days
• Field of Search: 349/33, 349/37, 349/34, 345/94, 345/209, 345/95, 345/96, 345/98, 345/100, 345/147, 345/103, 327/403
• US Class Current: 345/96
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2330/023 using energy recovery or conservation
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

A driver circuit to drive a display by inverting the voltage polarity operates with a reduced power consumption. The driver circuit includes a driving voltage selector circuit including positive and negative driving voltage selector circuits alternately arranged therein and a circuit which conducts a change-over operation between a state in which signals respectively from the positive and negative driving voltage selector circuits are respectively outputted to first and second terminals in a first horizontal period and a state in which signals respectively from the positive and negative driving voltage selector circuits are respectively sent to second and first terminals in a second horizontal period.

Claims

1. A driver circuit comprising:

a first driving voltage selector circuit and a second driving voltage selector circuit for respectively producing therefrom driving voltages respectively to first output terminals and second output terminals according to data inputted thereto, the driving voltage fed to the first output terminals having a polarity different from that of the driving voltage delivered to the second output terminals;

a first switching circuit selectively connecting said first output terminals to first driving output terminals, a second switching circuit selectively connecting said second output terminals to second driving output terminals; and

a third switching circuit selectively connecting said first output terminals to said second driving output terminals, and selectively connecting said second output terminals to said first driving output terminals.

2. A driver circuit in accordance with claim 1, wherein:

each said switching circuit being controlled by a control signal,

one said control signal is at a first level said first switching circuit connecting said first output terminals to said driving output terminals and said second switching circuit connecting said second output terminals to said second driving output terminals, and

one said control signal is at a second level said third switching circuit connecting said first output terminals to said second driving output terminals, and connecting said second output terminals to said first driving output terminals.

3. A driver circuit in accordance with claim 1, wherein:

the first driving voltage selector circuit generates a driving voltage having a first polarity in any situation; and

the second driving voltage selector circuit generates a driving voltage having a second polarity different from the first polarity in any situation.

4. A driver circuit as claimed in claim 1, wherein each said driving voltage selector circuits further comprising a plurality of transistors to produce a picture in a plurality of gradation levels.

5. A driver circuit as claimed in claim 4, wherein the output lines from said plurality of transistors in each driving voltage selector circuit being connected to said first and second output terminals, respectively, and the output lines of said plurality of transistors outputting a plurality of voltage levels.

6. A driver circuit as claimed in claim 4, further comprising a selector circuit for each respective driving voltage selector circuit, said selector circuit enabling the control lines of said plurality of transistors.

7. A driver circuit as claimed in claim 6, further comprising a plurality of n-bit shift shift registers, said shift registers obtaining video input data in response to a clock pulse;

and a plurality of n-bit latch to hold said video input data in response to a latch pulse, said selector circuits producing a selection signal to said control lines of said plurality of transistors in response to said video input data in said n-bit latch.

8. A driver circuit as claimed in claim 1, further comprising a fourth switching circuit selectively connecting said first driving output terminals to second driving output terminals, said fourth switching circuit being to equalize the electric charge of said first and second driving output terminals.