Surface-mounted semiconductor package and its manufacturing method

• US 5,886,876 A
• Filed: 12/05/1996
• Issued: 03/23/1999
• Est. Priority Date: 12/13/1995
• Status: Expired due to Fees

• Current Assignee: Oki Semiconductor Company Limited (ROHM Co., Ltd.)
• Original Assignee: OKI Electric Industry Company Limited
• Inventors: Yamaguchi, Tadashi
• Primary Examiner(s): Picard, Leo P.
• Assistant Examiner(s): Vigushin, John B.
• Application Number:
  US08/760,473
• Time in Patent Office: 838 Days
• Field of Search: 361/748, 361/816, 361/818, 361/767, 361/768, 361/717-720, 361/722, 361/782, 361/783, 361/771, 174/255, 174/256, 174/35 R, 174/52.1, 174/52.4, 174/260, 174/262, 174/266, 174/35 GC, 257/729, 257/704, 257/659, 257/660, 257/693, 257/723, 257/724, 257/725, 257/728, 257/730-732, 257/737, 257/738
• US Class Current: 361/767
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/055 the leads having a passage through the base H01L23/057 takes precedence
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16152 Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/207 Diameter ranges

Abstract

The semiconductor package contains the substrate with a stacked structure; the semiconductor device mounted on the top of the substrate and provided with the electrode pads; the input/output terminals on the bottom of the substrate, which connects the semiconductor package to the printed circuit board; and the conductive tubes going through the substrate, which connects the input/output terminals and the electrode pads. The surface-mounted semiconductor package has the protecting device on its sides. The protect device prevents water and the like from infiltrating the edges of the substrate, and additionally avoid a crack of the substrate due to expansion of the water. Furthermore, the protecting device has the pairs of lands on both sides of the substrate, which fasten the edges of the substrate.

Claims

1. A surface-mounted semiconductor package with a ball grid mountable array, and being on a top of printed circuit boards, comprising:

an insulating substrate comprised of bound fibers, the insulating substrate having a stack structure;

a semiconductor device mounted on a top of the insulating substrate and having a plurality of electrode pads;

a plurality of input/output meltable, ball-like terminals mounted on a bottom of the insulating substrate for attaching, by heating and melting the terminals, the semiconductor package to the printed circuit board;

a plurality of conductive portions penetrating the insulating substrate in a direction of a thickness thereof for electrically connecting the input/output terminals to the electrode pads, respectively;

a protecting metallic coating covering sides of the insulating substrate for preventing water from pervading the insulating substrate, and having a plurality of pairs of lands along edges of the top and bottom of the insulating substrate, and a stem portion covering the sides of said insulating substrate; and

a metallic cover covering the semiconductor device, and being secured to the respective stem portions of said metallic coating.

2. A surface-mounted semiconductor package as set forth in claim 1, wherein the insulating substrate is rectangular-shaped, and the protecting coating is provided along linear peripheral portions of the insulating substrate except for four corners thereof.