Multiprocessing computer system employing local and global address spaces and COMA and NUMA access modes
First Claim
1. A multiprocessing computer system comprising:
- a first processing node including a first processor, a first memory, and a first system interface; and
a second processing node coupled to said first processing node, said second processing node including a second memory, wherein said first memory and said second memory comprise a distributed shared memory system;
wherein said first processor is configured to initiate a first transaction having a first address, wherein a first portion of said first address is indicative of a location of a coherency unit corresponding to said first address within said distributed shared memory system, wherein said coherency unit is a number of contiguous bytes of memory,wherein a COMA mode is selected for said first transaction if said first portion of said first address indicates that said coherency unit is stored in said first memory, and wherein a NUMA mode is selected for said first transaction if said first portion of said first address indicates that said coherency unit is stored in said second memory, andwherein said first system interface is configured to initiate a NUMA coherency request responsive to said first transaction and said NUMA mode being selected for said first transaction, and wherein said first system interface is configured to initiate a COMA coherency request responsive to said first transaction, said COMA mode being selected and a corresponding coherency unit stored within said first memory is a copy of a third coherency unit stored within said second memory, and wherein said NUMA coherency request causes said first processor to complete said first transaction upon data stored within said second memory, wherein said COMA coherency request causes said first processor to complete said first transaction upon data stored within said first memory.
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Accused Products
Abstract
A multiprocessing computer system employs local and global address spaces and Non- Uniform Memory Architecture (NUMA) and Cache-Only Memory Architecture (COMA) access modes. The multiprocessing computer architecture employs a plurality of processing nodes. When a processing node initiates a memory transaction, the node determines whether the address of the memory transaction is a global address or a local physical address. If the address is a global address, a NUMA coherency request is initiated. Alternatively, if the address is a local physical address, a COMA coherency request is initiated. The nodes additionally include local physical address to global address translation units. The local physical address to global address translation units are configured to translate a local physical address to a corresponding global address prior to initiating a COMA coherency request.
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Citations
20 Claims
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1. A multiprocessing computer system comprising:
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a first processing node including a first processor, a first memory, and a first system interface; and a second processing node coupled to said first processing node, said second processing node including a second memory, wherein said first memory and said second memory comprise a distributed shared memory system; wherein said first processor is configured to initiate a first transaction having a first address, wherein a first portion of said first address is indicative of a location of a coherency unit corresponding to said first address within said distributed shared memory system, wherein said coherency unit is a number of contiguous bytes of memory, wherein a COMA mode is selected for said first transaction if said first portion of said first address indicates that said coherency unit is stored in said first memory, and wherein a NUMA mode is selected for said first transaction if said first portion of said first address indicates that said coherency unit is stored in said second memory, and wherein said first system interface is configured to initiate a NUMA coherency request responsive to said first transaction and said NUMA mode being selected for said first transaction, and wherein said first system interface is configured to initiate a COMA coherency request responsive to said first transaction, said COMA mode being selected and a corresponding coherency unit stored within said first memory is a copy of a third coherency unit stored within said second memory, and wherein said NUMA coherency request causes said first processor to complete said first transaction upon data stored within said second memory, wherein said COMA coherency request causes said first processor to complete said first transaction upon data stored within said first memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A system interface for a processing node in a multiprocessing system comprising
a system interface logic unit coupled to receive a transaction initiated by a processor within said processing node, said system interface logic unit is configured to generate a COMA coherency request in response to said transaction if a portion of an address corresponding to said transaction indicates a COMA mode for said transaction and a corresponding coherency unit stored within said first memory is a copy of a third coherency unit stored within said second memory, wherein said COMA coherency request causes said processor to complete said transaction upon data stored within a memory within said processing node, and wherein said system interface logic unit is configured to generate a NUMA coherency request in response to said transaction if said portion of said address indicates a NUMA mode for said transaction, wherein said NUMA coherency request causes said processor to complete said transaction upon data stored within a memory in a second processing node; - and
a translation unit coupled to said system interface logic unit, wherein said translation unit is configured to translate said address to a corresponding global address, said system interface logic unit is configured to receive said corresponding global address from said translation unit prior to initiating said COMA coherency request. - View Dependent Claims (13, 14, 15)
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16. A method for operating a multiprocessing computer system including a first processing node comprising a first processor and a first memory, said multiprocessing computer system further including a second processing node, the method comprising:
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initiating a transaction having an address corresponding to a coherency unit, said initiating performed by said first processor, wherein said coherency unit is a number of contiguous bytes of memory; generating a COMA coherency request if a portion of said address indicates a COMA mode for said transaction and a corresponding coherency unit stored within said first memory is a copy of a different coherency unit in a second memory within said second processing node, wherein said COMA coherency request causes said first processor to complete said transaction upon data stored within said first memory; and generating a NUMA coherency request if said portion of said address indicates a NUMA mode for said transaction, wherein said NUMA coherency request causes said first processor to complete said transaction upon data stored within said second memory. - View Dependent Claims (17, 18, 19, 20)
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Specification