Dynamically reconfigurable hardware system for real-time control of processes

• US 5,887,165 A
• Filed: 06/20/1997
• Issued: 03/23/1999
• Est. Priority Date: 06/21/1996
• Status: Expired due to Term

• Current Assignee: Hanger Solutions, LLC (IP Investments Group LLC)
• Original Assignee: Mirage Technologies, Inc.
• Inventors: Martel, Sylvain, Hunter, Ian W., Lafontaine, Serge R.
• Primary Examiner(s): Shin, Christopher B.
• Application Number:
  US08/879,923
• Time in Patent Office: 641 Days
• Field of Search: 395/651, 395/653, 395/652, 395/200.51, 395/830, 395/801.1
• US Class Current: 713/100
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G06F 9/3879 for non-native instruction execution, e.g. executing a command; for Java instruction set

Abstract

A dynanically reconfigurable hardware system for real-time control of ,an external device. Configuration of a dynamically reconfigurable logic module is provided on the basis of a hardware configuration established in a local configuration memory by a configuration signal received over a data bus from a host processor, thereby enabling an external device to be controlled in real-time independently of the host processor.

Claims

1. A dynamically reconfigurable hardware system for real-time control of an external device comprising:

(a) a configuration memory for storing a hardware configuration;

(b) a reconfigurable logic module, in communication with the configuration memory, for establishing the hardware configuration in the module on receipt of a configuration signal;

(c) a controller in communication over a data bus with the reconfigurable logic module and the configuration memory for sending the configuration signal to the reconfigurable logic module independently of the real-time control of the external device and for establishing the dynamically reconfigurable hardware configuration in the configuration memory; and

,

(d) a communication port coupled to the reconfigurable logic module independently of signals on the data bus for controlling the external device.

2. A hardware system as described in claim 1, wherein the configuration memory is dual-ported random access memory.

3. A hardware system according to claim 1, wherein the configuration memory is electrically erasable programmable read only memory.

4. A hardware system according to claim 1, wherein the data bus is in communication with a network.

5. A hardware system according to claim 1, further comprising:

(e) a network, wherein the controller is in communication a network, and at least a portion of the hardware configuration is retrievable from a remote location on the network.

6. A hardware system according to claim 1, further comprising:

(e) a computer having a central processing unit in communication with the data bus;

(f) a graphics display for a user interface; and

(g) a process executing on the central processing unit that sends user interface data to the display, wherein the reconfigurable logic module performs computations in parallel with the process executing on the central processing unit.

7. A hardware system according to claim 6, wherein the network is the Internet, the user interface is an Internet browser, and wherein the browser retrieves at least a part of the hardware configuration through the Internet.

8. A hardware system according to claim 1, wherein the system further comprises a digital signal processor that includes the controller.

9. A hardware system according to claim 4, wherein the network utilizes the IEEE P1394 protocol.

10. A method for controlling an external device in real time, the method comprising:

(a) receiving a configuration signal over a data bus;

(b) storing a hardware configuration in a configuration memory based at least on the configuration signal;

(c) providing a dynamically reconfigurable logic module in communication with the configuration memory for establishing the hardware configuration in the module;

(d) establishing the hardware configuration in the reconfigurable logic module; and

(e) utilizing the reconfigurable logic module to control the external device in real time independently of signals on the data bus.

11. A method according to claim 10, wherein step (e) includes providing at least a portion of the hardware configuration to the reconfigurable logic module over a network.