Semiconductor integrated circuit and fabrication method therefor

• US 5,889,334 A
• Filed: 12/03/1996
• Issued: 03/30/1999
• Est. Priority Date: 06/26/1996
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Hongo, Katsunobu
• Primary Examiner(s): Brown, Peter Toby
• Assistant Examiner(s): DUONG, HUNG V
• Application Number:
  US08/759,882
• Time in Patent Office: 847 Days
• Field of Search: 257/786, 257/369, 257/355, 257/207, 257/734
• US Class Current: 257/786
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 Integrated circuits

Abstract

A semiconductor integrated circuit and a fabrication method therefor has the configuration that the number of pad driver cells 21 to 23 are equal to or more than the number of input/output control circuits 11 to 13, poly-silicon wirings 111 to 113 are connected to an input terminal IN and output terminals CP and CN in each of the input/output control circuit 11 to 13 in a wiring region LIN and poly-silicon wirings 211 to 233 are connected to input terminals CP and CN and an output terminal IN of each of the pad driver cells 21 to 23 in the wiring region, and the poly-silicon wirings 111 to 133 are connected to poly-silicon wirings 211 to 233 through aluminum wirings.

Claims

1. A semiconductor integrated circuit comprising:

a plurality of input/output control circuits;

a plurality of pad driver cells, each pad driver cell being connectable to each lead frame; and

a wiring region formed between the plurality of input/output control circuits and the plurality of pad driver cells,

wherein the number of the plurality of pad driver cells is the same or more as the number of the plurality of input/output control circuits, third wirings made up of a material or materials which connect a first wirings connected to the plurality of input/output control circuit to a second wirings connected to the plurality of pad driver cells and the material of the third wirings are different from a material or materials forming the first wirings and the second wirings, there are no wirings between specified input/output control circuit which being located continuously in position in the plurality of input/output control circuits and the plurality of pad driver cells, and there are no wirings between specified pad driver cells, which being located in separately, in the plurality of pad driver cells and the plurality of input/output control circuits.

2. A semiconductor integrated circuit as claimed in claim 1, wherein wirings connected to the input terminals in the wirings connected to the specified input/output control circuits continuously positioned and connected to the specified pad driver cells continuously located are connected to a power source or to a ground and the wirings connected to the output terminals are open.

3. A semiconductor integrated circuit as claimed in claim 2, wherein each of the plurality of pad driver cells has a driver whose driving ability is equal to or more than the maximum driving ability in a driving ability required for each port which is connected to each of the corresponding input/output control circuit through the wiring region.

4. A semiconductor integrated circuit as claimed in claim 3, wherein the pad driver cell has a function corresponding to a function of the port corresponding to the input/output control circuit connected to this pad driver cell through the wiring region.

5. A semiconductor integrated circuit as claimed in claim 3, wherein the total number of the plurality of pad driver cells is greater than that of the plurality of input/output control circuits.

6. A semiconductor integrated circuit as claimed in claim 2, wherein the pad driver cell has a function corresponding to a function of the port corresponding to the input/output control circuit connected to this pad driver cell through the wiring region.

7. A semiconductor integrated circuit as claimed in claim 6, wherein the total number of the plurality of pad driver cells is greater than that of the plurality of input/output control circuits.

8. A semiconductor integrated circuit as claimed in claim 2, wherein the total number of the plurality of pad driver cells is greater than that of the plurality of input/output control circuits.

9. A semiconductor integrated circuit as claimed in claim 1, wherein each of the plurality of pad driver cells has a driver whose driving ability is equal to or more than the maximum driving ability in a driving ability required for each port which is connected to each of the corresponding input/output control circuit through the wiring region.

10. A semiconductor integrated circuit as claimed in claim 9, wherein the pad driver cell has a function corresponding to a function of the port corresponding to the input/output control circuit connected to this pad driver cell through the wiring region.

11. A semiconductor integrated circuit as claimed in claim 10, wherein the total number of the plurality of pad driver cells is greater than that of the plurality of input/output control circuits.

12. A semiconductor integrated circuit as claimed in claim 9, wherein the total number of the plurality of pad driver cells is greater than that of the plurality of input/output control circuits.

13. A semiconductor integrated circuit as claimed in claim 1, wherein the pad driver cell has a function corresponding to a function of the port corresponding to the input/output control circuit connected to this pad driver cell through the wiring region.

14. A semiconductor integrated circuit as claimed in claim 13, wherein the total number of the plurality of pad driver cells is greater than that of the plurality of input/output control circuits.

15. A semiconductor integrated circuit as claimed in claim 1, wherein the total number of the plurality of pad driver cells is greater than that of the plurality of input/output control circuits.