Apparatus for detecting arcing faults and ground faults in multiwire branch electric power circuits

• US 5,889,643 A
• Filed: 09/29/1997
• Issued: 03/30/1999
• Est. Priority Date: 09/29/1997
• Status: Expired due to Term

• Current Assignee: Eaton Corp. (Wisconsin) (Eaton Corporation PLC.)
• Original Assignee: Eaton Corp. (Wisconsin) (Eaton Corporation PLC.)
• Inventors: Elms, Robert Tracy
• Primary Examiner(s): Gaffin, Jeffrey
• Assistant Examiner(s): JACKSON, STEPHEN W
• Application Number:
  US08/939,263
• Time in Patent Office: 547 Days
• Field of Search: 361/42, 361/45, 361/93, 361/96, 361/115
• US Class Current: 361/42
• CPC Class Codes: H02H 1/0015 Using arc detectors
• CPC Class Codes: H02H 1/0038 concerning the connection of the detecting means, e.g. for reducing their number
• CPC Class Codes: H02H 3/05 with means for increasing reliability, e.g. redundancy arrangements for logic circuits H03K19/003
• CPC Class Codes: H02H 3/105 responsive to excess current and fault current to earth

Abstract

A multiwire branch circuit including two line conductors and a grounded, common neutral conductor is protected by a two pole circuit breaker connected to interrupt current flow in the two ungrounded line conductors. Three separate protection circuits provide arc fault protection for each of the ungrounded line conductors and ground fault protection for all three conductors. The arc fault detectors use the bimetal of the thermal-magnetic trip device for the associated line conductor, and therefore, are individually referenced to the associated line voltage. Hence, the outputs of the arc fault detectors are electrically isolated from each other and from the output of the ground fault detector, but operate a common trip circuit to open the two pole circuit breaker. The arc fault detectors have separate isolated power supplies. The ground fault detector is powered by a supply which is energized if either of the ungrounded line conductors is energized.

Claims

1. Apparatus for detecting faults in multiwire branch circuits including a first line conductor and a second line conductor fed by separate phases or a single center tapped phase, and a common neutral conductor, said apparatus comprising:

a two pole circuit breaker having a first pole connected to interrupt current in said first line conductor, and a second pole connected to interrupt current in said second line conductor simultaneously with interruption of current in said first line conductor when tripped; and

fault detection circuitry including a first arc fault detector connected to detect arc currents in said first line conductor and generate a first trip signal in response thereto, a second arc fault detector connected to detect arc currents in said second line conductor and generate a second trip signal in response thereto, a ground fault detector connected to detect ground faults in each of said first line conductor and second line conductor and generate a third trip signal in response thereto, and means responsive to each of said first trip signal, said second trip signal and said third trip signal to trip said two pole circuit breaker, and comprising a common trip circuit and means electrically isolating said first trip signal, said second trip signal and said third trip signal from each other.

2. The apparatus of claim 1 wherein said first arc fault detector further includes a first power supply reference to said first line conductor and wherein said second arc fault detector includes a second power supply referenced to said second line conductor.

3. The apparatus of claim 1 wherein said first arc fault detector includes a first known impedance in series in said first line conductor, means monitoring a first voltage across said first known impedance as a measure of current in said first line conductor and means referencing said first voltage to said first conductor, wherein said second arc fault detector includes a second known impedance connected in series with said second line conductor, means monitoring a second voltage across said second known impedance as an indication of current in said second line conductor and means referencing said second voltage to said second line conductor.

4. The apparatus of claim 3 wherein said first known impedance is a first bimetal in said first pole providing a time delayed first trip signal and wherein said second known impedance is a second bimetal in said second pole providing a time delayed second trip signal.

5. The apparatus of claim 1 wherein said ground fault detector further includes means detecting neutral to ground faults.

6. The apparatus of claim 5 wherein said means responsive to each of said first trip signal, said second trip signal and said third trip signal comprises a common trip circuit and means electrically isolating said first trip signal, said second trip signal and said third trip signal from each other.

7. The apparatus of claim 5 wherein said ground fault detector includes a ground fault power supply supplied by each of said first line conductor and second line conductor.

8. The apparatus of claim 7 wherein said first arc fault detector includes a first known impedance in series in said first line conductor, means monitoring a first voltage across said first known impedance as a measure of current in said first line conductor and means referencing said first voltage to said first conductor, wherein said second arc fault detector includes a second known impedance connected in series with said second line conductor, means monitoring a second voltage across said second known impedance as an indication of current in said second line conductor and means referencing said second voltage to said second line conductor.

9. The apparatus of claim 8 wherein said first arc fault detector further includes a first power supply referenced to said first line conductor and wherein said second arc fault detector includes a second power supply referenced to said second line conductor.

10. The apparatus of claim 8 wherein said first known impedance is a first bimetal in said first pole providing a time delayed first trip signal and wherein said second known impedance is a second bimetal in said second pole providing a time delayed second trip signal.

11. Apparatus for detecting faults in multiwire branch circuits including a first line conductor and a second line conductor fed by separate phases or a single centertapped phase, and a common neutral conductor, said apparatus comprising:

a two pole circuit breaker having a first pole connected to interrupt current in said first line conductor, and a second pole connected to interrupt current in said second line conductor simultaneously with interruption of current in said first line conductor when tripped; and

fault detection circuitry including;

a first arc fault detector connected to detect arc currents in said first line conductor and generate a first trip signal in response thereto and including a first known impedance in series with said first line conductor, means monitoring a first voltage across said first known impedance as a measure of current in said first line conductor and means referencing said first voltage to said first conductor;

a second arc fault detector connected to detect arc currents in said second line conductor and generate a second trip signal in response thereto and including a second known impedance connected in series with said second line conductor, means monitoring a second voltage across said second known impedance as a indication of current in said second line conductor and means referencing said second voltage to said second line conductor;

a ground fault detector connected to detect line to ground faults in each of said first line conductor and second line conductor and neutral to ground faults and generating a third trip signal in response thereto and powered by a ground fault power supply supplied by each of said first line conductor and second line conductor; and

means responsive to each of said first trip signal, said second trip signal and said third trip signal to trip said two pole circuit breaker.

12. The apparatus of claim 11 wherein said first known impedance is a first bimetal in said first pole providing a time delayed first trip signal and wherein said second known impedance is a second bimetal in said second pole providing a time delayed second trip signal.

13. The apparatus of claim 12 wherein said first arc fault detector further includes a first power supply referenced to said first line conductor and wherein said second arc fault detector includes a second power supply referenced to said second line conductor.

14. Apparatus for detecting faults in multiwire branch circuits including a first line conductor and a second line conductor fed by separate phases or a single center-tapped phase, and a common neutral conductor, said apparatus comprising:

a two pole circuit breaker having a first pole connected to interrupt current in said first line conductor, and a second pole connected to interrupt current in said second line conductor simultaneously with interruption of current in said first line conductor when tripped; and

fault detection circuitry including;

a first arc fault detector connected to detect arc currents in said first line conductor and generate a first trip signal in response thereto and including a first known impedance in series with said first line conductor, means monitoring a first voltage across said first known impedance as a measure of current in said first line conductor and means referencing said first voltage to said first conductor;

a second arc fault detector connected to detect arc currents in said second line conductor and generate a second trip signal in response thereto and including a second known impedance connected in series with said second line conductor, means monitoring a second voltage across said second known impedance as a indication of current in said second line conductor and means referencing said second voltage to said second line conductor;

a ground fault detector connected to detect ground faults in each of said first line conductor and second line conductor and generate a third trip signal in response thereto; and

means responsive to each of said first trip signal, said second trip signal and said third trip signal to trip said two pole circuit breaker.

15. The apparatus of claim 14 wherein said first known impedance is a first bimetal in said first pole providing a time delayed first trip signal and wherein said second known impedance is a second bimetal in said second pole providing a time delayed second trip signal.