Comparator with small signal suppression circuitry
First Claim
Patent Images
1. A combination comprising:
- a comparator having first and second inputs and an output, said comparator for producing a signal at said output having a first binary value when the signal applied to said first input is more positive than the signal applied to said second input and for producing a signal at said output having a second binary value when the signal applied to said second input is more positive than the signal applied to said first input;
means for applying a first input signal to said first input and for applying a second input signal to said second input; and
means for applying a first control signal to said first input and a second control signal to said second input whereby the net signal at said first input is a function of said first input signal and said first control signal and the net signal at said second input is a function of said second input signal and said second control signal;
wherein said first control signal alternates at a first rate between first and second levels and wherein said second control signal is the complement of said first control signal; and
wherein the amplitude of the control signals is selected such that for values of input signals below a predetermined value, the control signals override the input signals and the output of the comparator varies as a function of the amplitude and rate of said first and second control signals.
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Abstract
A comparator circuit has first and second inputs and an output and includes means for operating the comparator in alternate autozero and comparator phases. During an autozero phase, the inputs of the comparator are clamped to a reference potential and during a compare phase, input signals are applied to the input of the comparator. Control signals are applied to the inputs of the comparator during a portion of the compare phase. The control signals determine the state of the comparator output when the input signals applied to the inputs of the comparator are below a predetermined level.
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Citations
21 Claims
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1. A combination comprising:
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a comparator having first and second inputs and an output, said comparator for producing a signal at said output having a first binary value when the signal applied to said first input is more positive than the signal applied to said second input and for producing a signal at said output having a second binary value when the signal applied to said second input is more positive than the signal applied to said first input; means for applying a first input signal to said first input and for applying a second input signal to said second input; and means for applying a first control signal to said first input and a second control signal to said second input whereby the net signal at said first input is a function of said first input signal and said first control signal and the net signal at said second input is a function of said second input signal and said second control signal;
wherein said first control signal alternates at a first rate between first and second levels and wherein said second control signal is the complement of said first control signal; and
wherein the amplitude of the control signals is selected such that for values of input signals below a predetermined value, the control signals override the input signals and the output of the comparator varies as a function of the amplitude and rate of said first and second control signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A combination comprising:
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a comparator having first and second inputs and an output, said comparator for producing a signal at said output having a first binary value when the signal applied to said first input is more positive than the signal applied to said second input and for producing a signal at said output having a second binary value when the signal applied to said second input is more positive than the signal applied to said first input; first and second input terminals for the application thereto of first and second input signals, respectively; a first capacitor connected between said first input terminal and said first comparator input; a second capacitor connected between said second input terminal and said second comparator input; a third input terminal for the application thereto of a first control signal; a fourth input terminal for the application thereto of a second control signal which is the inverse of the first control signal; a third capacitor connected between said third input terminal and said first comparator input; and a fourth capacitor connected between said fourth input terminal and said second comparator input. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
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20. A combination comprising:
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a comparator having first and second inputs and an output, said comparator for producing a signal at said output having a first binary value when the signal applied to said first input is more positive than the signal applied to said second input and for producing a signal at said output having a second binary value when the signal applied to said second input is more positive than the signal applied to said first input; first and second input terminals for the application thereto of first and second input signals, respectively; means coupling said first input terminal to said first comparator input and said second input terminal to said second comparator input; third and fourth input terminals; a first capacitor connected between said third input terminal and said first comparator input and a second capacitor connected between said fourth input terminal and said second comparator input; and means for applying a first control signal to said third input terminal and the complement of said first control signal to said fourth input terminal;
wherein said first control signal and its complement are square waves which vary in amplitude between a first fixed level and a second fixed level.
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21. A comparator circuit having first and second inputs and an output and including means for operating the comparator in alternate autozero and comparator phases wherein during an autozero phase the inputs of the comparator are clamped to a reference potential and, during a compare phase, input signals are applied to the input of the comparator, the improvement comprising:
means for generating control signals and applying the control signals to the inputs of the comparator during a portion of the compare phase, said control signals determining the state of the comparator output when the input signals applied to the input of the comparator are below a predetermined level.
Specification