Device for the bus-networked operation of an electronic unit with microcontroller, and its use
First Claim
1. Device for the bus-networked operation of an electronic unit having a microcontroller for implementing communications with other units via a two-core bus, said device comprising:
- a bus protocol module in said microcontroller, for controlling communications with said other units, said bus protocol module having at least two operating modes as a function of status signals of the microcontroller, said operating modes comprising at least a transmission and reception mode NORMAL, and a sleep mode SLEEP;
a semiconductor circuit arranged in a signal flow path between said bus protocol module and said two core bus, and supplied from a superordinate potential, said semiconductor circuit comprisinga receiving circuit connected to cores of the two core bus and having an output coupled to communicate with a receiving input of the bus protocol module;
a transmitting circuit connected to said cores of the two core bus and having a transmitting output stage, the input of which is coupled to communicate with a transmission output of the bus protocol module; and
a wake-up identification circuit connected to said cores of said two core bus and having a wake-up input and switching means for providing, at a control output, a switch-on signal after identification of a wake-up signal received at said wake-up input or from the two core bus, and for emitting a switch-off signal in the operating mode "sleep"; and
a voltage regulator coupled to be supplied from the superordinate potential, and providing a regulated output voltage to the microcontroller and to the bus protocol module, said voltage regulator having a control input which communicates with the control output of the semiconductor circuit, and being configured to switch on in the presence of the switch-on signal and to switch off in the presence of the switch-off signal.
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Abstract
A device for bus-networked operation of an electronic unit having microcontroller has a semiconductor circuit which is supplied from a superordinate potential, and is connected between a bus protocol module of the microcontroller and the cores of a two core bus. The semiconductor circuit, which has at least two operating modes, "transmission and reception" (NORMAL) and "sleep" (SLEEP), compromises: a receiving circuit connected to the two bus cores, whose output communicates with a reception input of the bus protocol; a transmitting circuit coupled to receive the transmission output of the bus protocol function; a wake-up identification circuit connected to the cores of the two core bus, and having a wake-up input and switching means for providing, at a control output, a switch-on signal after identification of a wake-up signal from the wake-up input or from the bus, and for emitting a switch-off signal in the SLEEP mode. A voltage regulator, supplied from superordinate potential, provides a regulated output voltage to the microcontroller and to the bus protocol module. The voltage regulator has a control input which communicates with the control output of the semiconductor circuit, and is configured to switch on in the presence of the switch-on signal and to switch off in the presence of the switch-off signal,
65 Citations
29 Claims
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1. Device for the bus-networked operation of an electronic unit having a microcontroller for implementing communications with other units via a two-core bus, said device comprising:
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a bus protocol module in said microcontroller, for controlling communications with said other units, said bus protocol module having at least two operating modes as a function of status signals of the microcontroller, said operating modes comprising at least a transmission and reception mode NORMAL, and a sleep mode SLEEP; a semiconductor circuit arranged in a signal flow path between said bus protocol module and said two core bus, and supplied from a superordinate potential, said semiconductor circuit comprising a receiving circuit connected to cores of the two core bus and having an output coupled to communicate with a receiving input of the bus protocol module; a transmitting circuit connected to said cores of the two core bus and having a transmitting output stage, the input of which is coupled to communicate with a transmission output of the bus protocol module; and a wake-up identification circuit connected to said cores of said two core bus and having a wake-up input and switching means for providing, at a control output, a switch-on signal after identification of a wake-up signal received at said wake-up input or from the two core bus, and for emitting a switch-off signal in the operating mode "sleep"; and a voltage regulator coupled to be supplied from the superordinate potential, and providing a regulated output voltage to the microcontroller and to the bus protocol module, said voltage regulator having a control input which communicates with the control output of the semiconductor circuit, and being configured to switch on in the presence of the switch-on signal and to switch off in the presence of the switch-off signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29)
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Specification