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Field programmable gate array having programming instructions in the configuration bitstream

  • US 5,892,961 A
  • Filed: 08/29/1997
  • Issued: 04/06/1999
  • Est. Priority Date: 02/17/1995
  • Status: Expired due to Term
First Claim
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1. A programmable gate array comprising:

  • a bitstream comprising a combination of configuration data and programming instructions;

    a processor coupled to the bitstream for separating the configuration data from the programming instructions and for executing the programming instructions and havinga control state machine coupled to receive the configuration bitstream for decoding programming instructions and providing control signals; and

    an arithmetic logic unit coupled to receive a control signal from the control state machine and for performing arithmetic functions in response to programming instructions in the bitstream; and

    a memory array having a plurality of memory cells for receiving and storing configuration data transmitted from the processor.

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