Rapid response voltage threshold determination circuit for electrophysiology diagnostic device

• US 5,893,049 A
• Filed: 08/06/1996
• Issued: 04/06/1999
• Est. Priority Date: 08/06/1996
• Status: Expired due to Fees

• Current Assignee: Pacesetter Incorporated (Abbott Laboratories Incorporated)
• Original Assignee: Pacesetter Incorporated (Abbott Laboratories Incorporated)
• Inventors: Reggiardo, Christopher V.
• Primary Examiner(s): WACHSMAN, HAL D
• Application Number:
  US08/692,681
• Time in Patent Office: 973 Days
• Field of Search: 364/487, 364/480-483, 364/486, 364/550, 364/551.01, 364/580, 607/4, 607/7, 607/8, 607/28, 607/29-31, 371/24, 371/25.1, 371/26, 371/48, 371/49.2, 371/67.1, 395/183.01, 395/183.06, 395/750.04, 395/185.02, 128/696, 128/697, 128/699, 128/700, 702/66, 702/67, 702/69-71, 702/73, 702/74, 702/124, 702/193, 327/18, 327/77, 327/78, 327/80, 340/146.2, 341/101, 341/147, 341/155, 324/73.1, 365/189.07, 365/220, 365/221, 326/35
• US Class Current: 702/71
• CPC Class Codes: A61B 5/053 Measuring electrical impedance or conductance of a portion of the body
• CPC Class Codes: A61N 1/3956 Implantable devices for applying electric shocks to the heart, e.g. for cardioversion

Abstract

An electrophysiology diagnostic device generating a high voltage (HV) pulse of a predetermined shape, which device is electrically connected to a patient'"'"'s heart, i.e., a load resistance and which device includes a microprocessor and a load resistance measuring device, includes of a rapid response voltage threshold determination (RRVTD) circuit. The RRVTD circuit receives an actual signal corresponding to the HV pulse waveform, compares the actual signal with a desired signal and produces an error signal when the actual signal deviates from the desired signal by a predetermined threshold value. A method for operating a RRVTD circuit is also described.

Claims

1. A threshold circuit for rapid determination of an error between a desired waveform and an actual waveform, comprising:

a microprocessor generating a respective output word corresponding to the desired waveform at each of a plurality of sampling times;

a parallel to serial converter operatively connected to said microprocessor for generating a desired serial bit steam from said output word at respective ones of said sampling times;

a serial analog to digital converter generating an actual serial bit stream corresponding to the actual waveform;

a digital single bit comparator receiving said actual serial bit stream and said desired serial bit stream in most significant bit to least significant bit order so as to permit generation of an error signal signifying that an error between said desired and said actual waveforms exceeds a predetermined threshold when a non-zero bit is generated by said single bit comparator.

2. A threshold circuit for rapid determination of an error between a desired waveform and an actual waveform, comprising:

processor means for generating a respective output word corresponding to the desired waveform at each of a plurality of sampling times;

first converter means operatively connected to said processing means for generating a desired serial bit steam from said output word at respective ones of said sampling times;

second converting means for generating an actual serial bit stream corresponding to the actual waveform;

comparator means receiving said actual serial bit stream and said desired serial bit stream in most significant bit to least significant bit order for generating an error signal when an error between said desired and said actual waveforms exceeds a predetermined threshold when a non-zero bit is generated by said comparator means.

3. A method permitting for rapid determination of an error between a desired waveform and an actual high voltage (HV) pulse waveform, said method comprising the steps of:

generating a respective output word corresponding to the desired waveform;

producing a desired serial bit stream from said respective output word;

sampling the actual waveform following initiation of a HV pulse event so as to produce an actual serial bit stream corresponding thereto;

comparing respective individual bits of said actual serial bit stream and said desired serial bit stream seriatim in most significant bit to least significant bit order; and

producing an error signal when a non-zero bit is generated during said comparing step.