Semiconductor package with pre-fabricated cover and method of fabrication

• US 5,893,726 A
• Filed: 12/15/1997
• Issued: 04/13/1999
• Est. Priority Date: 12/15/1997
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farnworth, Warren M., Hembree, David R., Wark, James M., Akram, Salman, Thummel, Steven G., Gochnour, Derek, Jacobson, John O.
• Primary Examiner(s): Picardat, Kevin M.
• Assistant Examiner(s): COLLINS, DEVEN M
• Application Number:
  US08/990,866
• Time in Patent Office: 484 Days
• Field of Search: 438/108, 438/107, 438/106
• US Class Current: 438/108
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15151 the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
• CPC Class Codes: H01L 2924/15174 in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16152 Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/16195 Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/207 Diameter ranges

Abstract

A semiconductor package includes a substrate having one or more dice mounted thereto, and a cover adapted to protect and form a sealed space for the dice. The cover can be pre-fabricated of molded plastic, or stamped metal, and attached to the substrate using a cured seal. A hole can also be provided through the substrate to permit pressure equalization during formation of the seal. The cover can be prefabricated in an enclosed configuration for attachment directly to the substrate, or in a planar configuration for attachment to a peripheral ridge on the substrate. In either embodiment, the cover is removable to permit defective dice to be replaced or repaired.

Claims

1. A method for assembling a semiconductor package comprising:

providing a substrate comprising a plurality of external contacts;

mounting a semiconductor die to the substrate in electrical communication with the external contacts;

providing a cover configured for attachment to the substrate to enclose the die;

applying a seal material to the cover or to the substrate; and

placing the cover on the substrate, with the cover enclosing the die, and with the seal material attaching the cover to the substrate, and forming a seal between the cover and the substrate.

2. The method of claim 1 further comprising following the placing step, testing the die, removing the cover, replacing the die and forming a second seal between the cover and the substrate.

3. The method of claim 1 further comprising providing the substrate with a hole and permitting gas to exit or enter through the hole during the placing step.

4. The method of claim 1 wherein the cover comprises a material selected from the grout consisting of plastic and metal.

5. The method of claim 1 wherein the external contacts comprise a ball grid array.

6. The method of claim 1 further comprising during the placing step, curing the seal material.

7. A method for assembling a semiconductor package comprising:

providing a substrate having a hole therethrough;

mounting a plurality of semiconductor dice to the substrate proximate to the hole;

providing a cover configured for attachment to the substrate to enclose the dice in a space;

applying seal material to the cover or to the substrate, the seal material comprising a curable material;

placing the cover on the substrate and over the dice;

curing the seal material to form a seal between the cover and substrate, to seal the space, and to attach the cover to the substrate; and

permitting gas to exit or enter through the hole during the placing and curing steps.

8. The method of claim 7 further comprising sealing the hole following the permitting step.

9. The method of claim 7 wherein the seal material comprises a material selected from the group consisting of silicone adhesives, room temperature vulcanizing materials, thermosetting resins, cyanoacrylate adhesives, and anaerobic acrylic adhesives.

10. The method of claim 7 further comprising following the placing step, testing the dice, removing the cover, replacing at least one die, and forming a second seal between the cover and substrate.

11. A method for assembling a semiconductor package comprising:

providing a substrate comprising a plurality of semiconductor dice;

providing a cover configured for attachment to the substrate to enclose the dice;

applying a first quantity of adhesive material to the cover or to the substrate;

tacking the cover to the substrate using the first quantity of adhesive material;

following the tacking step, testing the dice; and

following the testing step, applying a second quantity of adhesive material between the cover and the substrate to form a seal therebetween.

12. The method of claim 11 wherein the first quantity of adhesive material comprises adhesive dots.

13. The method as claimed in claim 11 wherein the second quantity of adhesive material comprises a curable material.

14. A method for assembling a semiconductor package comprising:

providing a substrate comprising a plurality of external contacts;

mounting a semiconductor die to the substrate in electrical communication with the external contacts;

applying an adhesive material to the substrate in a configuration that forms a ridge on the substrate surrounding the die;

providing a cover configured for attachment to the ridge to enclose the die and form a space;

placing the cover on the ridge; and

curing the adhesive material to attach the cover to the ridge and seal the space.

15. The method of claim 14 wherein the adhesive material comprises a material selected from the group consisting of silicone, room temperature vulcanizing material, thermosetting resin, cyanoacrylate adhesive, and anaerobic acrylic adhesive.

16. The method of claim 14 wherein the ridge comprises an elastomeric material.

17. The method of claim 14 wherein the adhesive material comprises a heat curable material.

18. The method of claim 14 wherein the adhesive material comprises a deposited, patterned and developed resist.

19. A method for assembling a semiconductor package comprising:

providing a substrate;

forming a ridge on the substrate having a peripheral outline and comprising a curable adhesive material;

mounting a semiconductor die to the substrate within the peripheral outline of the ridge;

providing a cover configured for attachment to the ridge;

placing the cover on the ridge; and

curing the adhesive material to attach the cover to the substrate and form a seal.

20. The method of claim 19 wherein the adhesive material comprises a material selected from the group consisting of silicone, room temperature vulcanizing material, thermosetting resin, cyanoacrylate adhesive, and anaerobic acrylic adhesive.

21. The method of claim 19 wherein the adhesive material comprises a deposited, patterned and developed resist.

22. The method of claim 19 wherein the ridge comprises a molded portion of the substrate.

23. The method of claim 19 wherein the ridge comprises a separate member attached to the substrate.