IC testing apparatus

• US 5,894,226 A
• Filed: 05/28/1997
• Issued: 04/13/1999
• Est. Priority Date: 05/30/1996
• Status: Expired due to Fees

• Current Assignee: Yokogawa Electric Corporation
• Original Assignee: Ando Electric Co., Ltd. (Yokogawa Electric Corporation)
• Inventors: Koyama, Jo
• Primary Examiner(s): BROWN, GLENN WARNER
• Application Number:
  US08/864,453
• Time in Patent Office: 685 Days
• Field of Search: 324/765, 324/73.1, 324/158.1, 324/76.52, 324/76.62, 324/76.74, 324/76.79, 371/1, 375/371
• US Class Current: 324/762.02
• CPC Class Codes: G01R 31/31709 Jitter measurements; Jitter generators measuring jitter, noise figure or signal-to-noise ratio per se G01R29/26; analysis of tester signals G01R31/31901
• CPC Class Codes: G01R 31/3191 Calibration

Abstract

An IC testing apparatus performs testing on a test device such as an IC using test signals each consisting of test pulses. The apparatus contains skew adjusting circuits, drivers and comparators. Herein, the skew adjusting circuit receives a test signal to perform a skew adjustment. The driver converts an output of the skew adjusting circuit in voltage to match with the test device, so that an output signal of the driver is sent to the test device for the testing. The comparator compares an input signal thereof given from the test device with a reference value. Due to the provision of the drivers and comparators, there is the driver skew and comparator skew. A decision circuit is provided to make a decision as to whether the output of the skew adjusting circuit delays or advances from a decision strobe signal which synchronizes with the test signal, thus producing a decision signal. An amount of skew corrections is counted from the decision signal with a precision to create skew correction data. The skew adjusting circuits are controlled based on the skew correction data to perform the skew adjustment. By controlling the precision, it is possible to realize a high-precision skew adjustment on the test signals which contain jitters.

Claims

1. An IC testing apparatus comprising:

at least two skew adjusting means, each of which performs a skew adjustment on a test signal input thereto;

selecting means for selecting one of the at least two skew adjusting means, so that the selecting means provides an adjusted test signal outputted from the selected skew adjusting means;

decision means for performing a decision as to a timing relationship between the adjusted test signal outputted from the selected skew adjusting means and a decision strobe signal which synchronizes with the test signal;

comparison means for performing a comparison between a result of the decision and a precision selecting signal representing a precision to detect the timing relationship; and

control means for controlling the selected skew adjusting means on the basis of a result of the comparison to delay or advance the test signal.

2. An IC testing apparatus as defined in claim 1 further comprising:

reference signal generating means for generating a reference signal which simulates the test signal;

timing adjusting means, which is connected to the skew adjusting means in parallel, for performing a timing adjustment on the reference signal which is transmitted thereto via the selecting means, so that the timing adjusting means provides an adjusted reference signal; and

timing decision means for performing a decision as to a timing relationship between the adjusted reference signal outputted from the timing adjusting means and a strobe signal which synchronizes with the reference signal, wherein the comparison means performs a comparison between a result of the decision performed by the timing decision means and the precision selecting signal, so that the control means controls the timing adjusting means on the basis of a result of the comparison to delay or advance the reference signal.

3. An IC testing apparatus as defined in claim 1 wherein the selecting means is configured by a multiplexer.

4. An IC testing apparatus, which performs testing on a test device using test signals each consisting of test pulses, comprising:

first series circuit means which consists of a skew adjusting circuit receiving a test signal and a driver, wherein the driver converts an output signal of the skew adjusting circuit in voltage to match with the test device, so that an output signal of the driver is sent to the test device;

second series circuit means which is connected in parallel with the first series circuit means, wherein the second series circuit means consists of a comparator for comparing an input signal thereof given from the test device with a reference value and a skew adjusting circuit receiving an output signal of the comparator;

first decision means for making a decision as to whether an output of the first series circuit means delays or advances from a first decision strobe signal which synchronizes with the test signal, thus producing a first decision signal;

reference signal generating means for generating a reference signal which simulates the test signal;

second decision means, coupled with the second circuit means in series, for making a decision as to whether an output of the second series circuit means delays or advances from a second decision strobe signal which synchronizes with the reference signal, thus producing a second decision signal;

multiplexer means for changing over connections thereof in such a way that when adjusting a driver skew, an output of the first series circuit means is transmitted to the first decision means, whilst when adjusting a comparator skew, the reference signal outputted from the reference signal generating means is transmitted to the second series circuit means;

skew counting means for counting an amount of skew corrections based on the first decision signal and/or the second decision signal with a precision which is designated in advance, thus creating skew correction data; and

control means for controlling the first series circuit means and/or the second series circuit means to adjust the driver skew and/or the comparator skew on the basis of the skew correction data.

5. An IC testing apparatus as defined in claim 4 wherein the skew counting means operates in response to a normal mode and a high-precision mode respectively, so that in the normal mode, the skew counting means creates the skew correction data directly based on the first decision signal and/or the second decision signal, whilst in the high-precision mode, the skew counting means creates the skew correction data with the precision which is designated in advance.