Integrated edge structure for high voltage semiconductor devices and related manufacturing process

• US 5,895,249 A
• Filed: 02/20/1996
• Issued: 04/20/1999
• Est. Priority Date: 07/01/1993
• Status: Expired due to Term

• Current Assignee: Consorzio Per Il Sistema Informativo Csi Piemonte
• Original Assignee: Consorzio Per Il Sistema Informativo Csi Piemonte
• Inventors: Leonardi, Salvatore, Zambrano, Raffaele, Cacciola, Giovanna
• Primary Examiner(s): DANG, TRUNG Q
• Application Number:
  US08/604,110
• Time in Patent Office: 1,155 Days
• Field of Search: 437/27, 437/74, 437/75, 437/76, 437/77, 438/309, 438/335, 438/340, 438/356, 438/357, 438/358
• US Class Current: 438/356
• CPC Class Codes: H01L 29/0615 by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] LDD or drain offset regions H01L29/7833
• CPC Class Codes: H01L 29/1004 Base region of bipolar transistors
• CPC Class Codes: H01L 29/66295 with main current going through the whole silicon substrate, e.g. power bipolar transistor

Abstract

An integrated edge structure for a high voltage semiconductor device comprising a PN junction represented by a diffused region of a first conductivity type extending from a semiconductor device top surface is described. The edge structure comprises a first, lightly doped ring of the first conductivity type obtained in a first, lightly doped epitaxial layer of a second conductivity type and surrounding said diffused region, and a second, lightly doped ring of the first conductivity type, comprising at least one portion superimposed on and merged with said first ring, obtained in a second, lightly doped epitaxial layer of the second conductivity type grown over the first epitaxial layer.

Claims

1. A method for manufacturing an integrated edge structure for a high voltage monolithic semiconductor device, the method comprising the steps of:

a) growing a first lightly doped epitaxial layer of a second conductivity type over a heavily doped semiconductor substrate;

b) maskedly implanting and subsequently diffusing dopants into said first epitaxial layer to form a first lightly doped ring of a first conductivity type;

c) growing a second lightly doped epitaxial layer of the second conductivity type over said first epitaxial layer;

d) maskedly implanting subsequent diffusing dopants into said second epitaxial layer to form a diffused region of the first conductivity type said diffused region of the first conductivity type forming a first region of the PN junction, and said first and second epitaxial layers of the second conductivity type forming a second region of the PN junction; and

e) maskedly implanting and subsequently diffusing dopants into said second epitaxial layer to form a second lightly doped ring of the first conductivity type comprising at least one portion superimposed over and merged with said first ring, the second lightly doped ring surrounding and being merged with the diffused region of the first conductivity type.

2. The process according to claim 1, further comprising a step of maskedly implanting and subsequent diffusing dopants into said first epitaxial layer to form a buried region of a first conductivity type, said first ring surrounding the buried region and said diffused region being superimposed on and merged with said buried region, said further step being performed between steps (a) and (b).

3. The process according to claim 1, wherein the semiconductor substrate is of the first conductivity type.

4. The process according to claim 1, wherein the semiconductor substrate is of the second conductivity type.

5. A method for manufacturing an integrated edge structure for spreading the depletion layer of a PN junction, which results from a diffused region of a first conductivity type abutting a region of a second conductivity type, the method comprising the steps of:

forming a first lightly doped ring of the first conductivity type around the diffused region; and

forming a second lightly doped ring of the first conductivity type superimposed over and merged with the first ring and also surrounding and being merged with the diffused region.