Integrated edge structure for high voltage semiconductor devices and related manufacturing process
First Claim
1. A method for manufacturing an integrated edge structure for a high voltage monolithic semiconductor device, the method comprising the steps of:
- a) growing a first lightly doped epitaxial layer of a second conductivity type over a heavily doped semiconductor substrate;
b) maskedly implanting and subsequently diffusing dopants into said first epitaxial layer to form a first lightly doped ring of a first conductivity type;
c) growing a second lightly doped epitaxial layer of the second conductivity type over said first epitaxial layer;
d) maskedly implanting subsequent diffusing dopants into said second epitaxial layer to form a diffused region of the first conductivity type said diffused region of the first conductivity type forming a first region of the PN junction, and said first and second epitaxial layers of the second conductivity type forming a second region of the PN junction; and
e) maskedly implanting and subsequently diffusing dopants into said second epitaxial layer to form a second lightly doped ring of the first conductivity type comprising at least one portion superimposed over and merged with said first ring, the second lightly doped ring surrounding and being merged with the diffused region of the first conductivity type.
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Abstract
An integrated edge structure for a high voltage semiconductor device comprising a PN junction represented by a diffused region of a first conductivity type extending from a semiconductor device top surface is described. The edge structure comprises a first, lightly doped ring of the first conductivity type obtained in a first, lightly doped epitaxial layer of a second conductivity type and surrounding said diffused region, and a second, lightly doped ring of the first conductivity type, comprising at least one portion superimposed on and merged with said first ring, obtained in a second, lightly doped epitaxial layer of the second conductivity type grown over the first epitaxial layer.
19 Citations
5 Claims
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1. A method for manufacturing an integrated edge structure for a high voltage monolithic semiconductor device, the method comprising the steps of:
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a) growing a first lightly doped epitaxial layer of a second conductivity type over a heavily doped semiconductor substrate; b) maskedly implanting and subsequently diffusing dopants into said first epitaxial layer to form a first lightly doped ring of a first conductivity type; c) growing a second lightly doped epitaxial layer of the second conductivity type over said first epitaxial layer; d) maskedly implanting subsequent diffusing dopants into said second epitaxial layer to form a diffused region of the first conductivity type said diffused region of the first conductivity type forming a first region of the PN junction, and said first and second epitaxial layers of the second conductivity type forming a second region of the PN junction; and e) maskedly implanting and subsequently diffusing dopants into said second epitaxial layer to form a second lightly doped ring of the first conductivity type comprising at least one portion superimposed over and merged with said first ring, the second lightly doped ring surrounding and being merged with the diffused region of the first conductivity type. - View Dependent Claims (2, 3, 4)
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5. A method for manufacturing an integrated edge structure for spreading the depletion layer of a PN junction, which results from a diffused region of a first conductivity type abutting a region of a second conductivity type, the method comprising the steps of:
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forming a first lightly doped ring of the first conductivity type around the diffused region; and forming a second lightly doped ring of the first conductivity type superimposed over and merged with the first ring and also surrounding and being merged with the diffused region.
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Specification