Durable substrate subassembly for transistor switch module

• US 5,895,974 A
• Filed: 04/06/1998
• Issued: 04/20/1999
• Est. Priority Date: 04/06/1998
• Status: Expired due to Term

• Current Assignee: Delphi Technologies Ip Limited (BorgWarner Incorporated)
• Original Assignee: Delco Electronics Corporation (General Motors Company)
• Inventors: Bramel, Michael D., Lachenmaier, Frank David, Eytcheson, Charles Tyler, Nakanishi, Todd G.
• Primary Examiner(s): Wojciechowicz, Edward
• Assistant Examiner(s): CLARK, SHEILA V
• Application Number:
  US09/056,046
• Time in Patent Office: 379 Days
• Field of Search: 257/107, 257/723, 257/724, 257/703, 257/707, 257/706, 257/705
• US Class Current: 257/723
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/37147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/37599 Material
• CPC Class Codes: H01L 2224/37686 with a principal constituent of the material being a non metallic, non metalloid inorganic material
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/73221 Strap and wire connectors
• CPC Class Codes: H01L 2224/84801 Soldering or alloying
• CPC Class Codes: H01L 24/37 of an individual strap connector
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/84 using a strap connector
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/19107 off-chip wires
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

A durable substrate subassembly for a high power transistor switching module. The substrate subassembly is durable because wire bonds to the semiconductor device electrodes are replaced with a soldered metal/ceramic composite conductor. The part of the composite conductor contacting the semiconductor device has a coefficient of thermal expansion close to that of the semiconductor device. The metal of the composite conductor is preferably a strip of copper foil. The ceramic portion is a layer of alumina on the copper foil that is generally coextensive with the semiconductor device electrodes.

Claims

1. A durable composite substrate subassembly useful in electronic switching modules comprising:

a ceramic wafer having first and second opposed major faces and a coefficient of thermal expansion close to a thermal expansion coefficient of a selected semiconductor material, said first and second faces being metallized;

a first metal tab on said first metallized face that extends away from the ceramic wafer for electrical connection to a terminal member;

a semiconductor switching device chip of said selected semiconductor material thermally and electrically conductively bonded to said first metallized face, wherein a first region of said device chip is in low electrical resistance connection with said first metal tab;

a first ceramic layer bonded to a portion of said first metallized face adjacent said device chip, said first ceramic layer having a metallized upper surface;

a second metal tab on said metallized upper surface of said first ceramic layer that extends away from the ceramic wafer for electrical connection to a terminal member;

a metal foil conductively bonded to electrodes on an upper surface of said device chip and also to said metallized upper surface of said first ceramic layer, wherein a second region of said device chip is in low electrical resistance connection with said second metal tab, said metal foil having an upper surface; and

a second ceramic layer bonded to said metal foil upper surface, said second ceramic layer being disposed over said device chip, said ceramic layer and said copper foil forming a composite material having a coefficient of thermal expansion close to that of said selected semiconductor material;

effective to provide a durable heat conductive subassembly that includes an electrical and thermal connection to an upper surface of said device chip that has a composite coefficient of thermal expansion close to that of said device chip.

2. The composite substrate subassembly as recited in claim 1 wherein the substrate subassembly further includes:

a metallized upper surface on said second ceramic layer; and

a low resistance electrical connection between a third region of said device chip and said metallized upper surface of said second ceramic layer;

wherein said metal foil, said second ceramic layer and said metallized upper surface of said second ceramic layer have a composite coefficient of thermal expansion close to that of said semiconductor.

3. The composite substrate subassembly as recited in claim 2 wherein said substrate subassembly further includes an electrical resistance element in series with said third region of said device chip.

4. The composite substrate subassembly as recited in claim 2 wherein said selected semiconductor material is silicon, said switching device chip is a high power IGBT, said metallized faces and surfaces are films of copper, said first metal foil is copper, said ceramic wafer and said first ceramic layer are of beryllium oxide, said second ceramic layer is of alumina, and copper oxide bonds contacting surfaces of said ceramics and said copper.

5. The composite substrate subassembly as recited in claim 4 wherein said device chip is an insulated gate bipolar transistor and the substrate subassembly further includes a semiconductor diode chip bonded to said first metallized wafer face, said diode chip being of said selected semiconductor material.

6. The composite substrate subassembly as recited in claim 5 wherein the substrate subassembly further includes:

a second metal foil bonded to an upper surface of said diode chip and also to said metallized face of said first ceramic layer, said second metal foil having an upper surface; and

a third ceramic layer bonded to said upper surface of said second metal foil over said diode chip, said third ceramic layer and said second metal foil forming a composite material having a composite coefficient of thermal expansion close to that of said selected semiconductor material.

7. The composite substrate subassembly as recited in claim 6 wherein:

the ceramic wafer has a thickness of the order of about one millimeter;

the device chip is silicon insulated gate bipolar transistor;

said second metal foil is of copper;

said third ceramic layer is of alumina; and

a copper oxide bond joins contacting surfaces of the second metal foil and the third ceramic layer.

8. The composite substrate subassembly as recited in claim 7 wherein:

each metal tab is of copper and is integral with the metallizing copper film from which it extends; and

both of said first and second tabs extend outwardly from the same edge of said wafer in closely spaced disposition.

9. The composite substrate subassembly as recited in claim 8 wherein said substrate subassembly further includes an electrical resistance unit in series electrical connection with said metallized upper surface of said second ceramic layer.

10. The composite substrate subassembly as recited in claim 9 wherein said electrical resistance unit is a trimmable resistor supported on said first metallized wafer face, and a filamentary wire provides said series electrical connection between said trimmable electrical resistance unit and said metallized upper surface of said second ceramic layer.

11. A high power module containing a high power semiconductor switching device, said module comprising:

a thermally conductive support plate having a thermal expansion coefficient close to a given coefficient of thermal expansion;

a high power semiconductor switching device composite substrate subassembly including a ceramic wafer having first and second opposed faces that are substantially completely metallized and separated by unmetallized edges of said wafer, said wafer having a coefficient of thermal expansion close to said given coefficient of thermal expansion and being disposed on said support plate with its metallized second face in low resistance thermal and electrical contact therewith;

a high power semiconductor switching device chip of a semiconductor material having said given coefficient of thermal expansion disposed on the metallized first wafer face in low resistance thermal and electrical contact therewith;

first and second terminal members of the module disposed in close proximity to an edge of said wafer;

a first integral tab on said metallized first wafer face that extends away from said wafer edge and connects with the first terminal member, to establish a short low electrical resistance connection of a given impedance between a first region of said device chip and the first terminal member;

a first ceramic layer on said metallized first wafer face adjacent said device chip, said first ceramic layer having a metallized upper surface;

a second integral tab on said metallized upper surface of said first ceramic layer that extends away from the wafer edge and connects with the second terminal member, to establish a short low electrical resistance connection of given impedance between a second region of said device chip and said second terminal member;

a metal foil conductively bonded to electrodes on an upper surface of said device chip and also to said metallized upper surface of said first ceramic layer;

a second ceramic layer on an upper surface of said metal foil over said device chip, said second ceramic layer having a coefficient of thermal expansion close to that of said device chip and providing an electrical and thermal connection to said device chip that has a composite coefficient of thermal expansion close to that of said device chip.

12. The high power module of claim 11 in which the semiconductor switching device chip is an insulated gate bipolar transistor chip.

13. The high power module of claim 12 in which said metallized faces and surfaces are films of copper, said metal foil is copper, and said ceramic wafer and first ceramic layer is of beryllium oxide, and said second ceramic layer is of aluminum oxide.

14. A high power module containing a plurality of high power insulated gate switching transistors in heat conductive subassemblies that include a durable topside chip connection having a coefficient of thermal expansion close to that of said transistor chip, said module comprising:

a housing having a thermally conductive support plate of a material having a thermal expansion coefficient close to a given thermal expansion coefficient;

a plurality of similar semiconductor switching transistor substrate subassemblies supported on said support plate in similar low thermal resistance relationship with said support plate;

each of said semiconductor switching transistor substrate subassemblies including a ceramic wafer having opposed major faces that each are of an area less than will accommodate two high power switching transistor chips, said wafer faces being substantially completely metallized and spaced by unmetallized edges of said wafer, and forming a composite material having a composite thermal expansion coefficient close to said given thermal expansion coefficient;

each ceramic wafer having a single high power switching transistor chip thermally and electrically conductively bonded to one metallized wafer face, and a first metal tab extending from said one metallized wafer face, which tab is in low electrical resistance communication with a first active region of said switching transistor chip and which resistance is of essentially the same impedance for each subassembly, said switching transistor chip being of a semiconductor material having said given thermal expansion coefficient;

each one metallized wafer face having a first ceramic layer bonded thereto adjacent said transistor chip, said first ceramic layer having a metallized upper surface and a second metal tab extending therefrom;

each said subassembly further including a metal foil conductively bonded to electrodes on an upper surface of its respective switching transistor chip and also to said metallized upper surface of its respective first ceramic layer, whereby a low resistance connection of substantially the same impedance is provided in each subassembly between a second region of its respective transistor chip and its respective second metal tab;

each said metal foil having a second ceramic layer on its upper surface over the transistor chip to which is bonded, said second ceramic layer having a coefficient of thermal expansion close to that of said transistor chip, said second ceramic layer and said foil having a composite thermal expansion coefficient over said chip that is close to said given thermal expansion coefficient;

a first module terminal member having at least a portion disposed in said housing, in substantially equal close proximity to each first metal tab on each substrate subassembly;

an electrically conductive bond directly between each first metal tab and said first terminal member, whereby said first terminal member has a low resistance electrical connection of essentially the same impedance with said first region of each transistor chip of each substrate subassembly;

a second module terminal member having at least a portion disposed in said housing, in substantially equal close proximity to each second metal tab on each substrate subassembly; and

an electrically conductive bond directly between said second metal tab and said second terminal member, whereby said second terminal member has a low resistance electrical connection of essentially the same impedance with said second region of each transistor chip of each substrate subassembly.

15. The high power module of claim 14 in which:

the transistor chip is a silicon insulated gate bipolar transistor chip; and

the module further includes a gate bus conductor in series connection with a third region of each transistor of each subassembly and a trimmable resistance between said bus conductor and each said third region.

16. A composite conductor for use as soldered connector to a semiconductor device of a semiconductor material having a given thermal expansion coefficient, said conductor comprising:

a metal foil having a given major surface portion for soldering to one or more contact areas of a semiconductor device made of a semiconductor material having a given thermal expansion coefficient;

a layer of ceramic on a corresponding portion of an opposite major surface of said foil; and

said ceramic and said foil having a composite thermal expansion coefficient in said portion close to said given thermal expansion coefficient.

17. A semiconductor device assembly having an improved electrical connection thereto, said assembly comprising:

a semiconductor device chip of a semiconductor material having a given thermal expansion coefficient, said chip having a contact face;

at least one area of contact on said face for a given region of said device, said area occupying a major portion of said contact face;

a metal foil having opposed major surfaces and a portion of one major surface soldered to said at least one area;

a layer of ceramic on a corresponding portion of the opposite major surface of said foil; and

said ceramic and said foil having a composite thermal expansion coefficient in said portion close to said given thermal expansion coefficient.

18. The semiconductor device assembly of claim 17 in which the semiconductor material is silicon, the metal foil is copper, and said ceramic layer is alumina.