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Routing methods for a multinode SCI computer system

  • US 5,898,827 A
  • Filed: 09/27/1996
  • Issued: 04/27/1999
  • Est. Priority Date: 09/27/1996
  • Status: Expired due to Term
First Claim
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1. A multi-processor computer system comprising:

  • a two dimensional array of nodes having rows and columns, each node having at least one processor, and each node has a corresponding ID indicating a position of each node in the array;

    a plurality of interface rings, wherein the nodes in each row are linked together by at least one of the rings, and the nodes in each column are linked together by at least one of the rings;

    a plurality of controllers, with each node having at least one controller, and said one controller interfaces the node with two rings;

    one ring being in a column direction and the other ring being in a row direction;

    a data packet that includes an ID of a destination node, the packet is sent to a receiving controller in a receiving node, wherein the receiving controller compares an ID of the receiving node with the ID stored in data packet to determine whether a destination match has occurred;

    when the destination match has occurred, the controller accepts the data packet for processing by the node; and

    when the destination match has not occurred, the controller routes the data packet to an adjacent node; and

    a plurality of configuration registers, with each node having a respective configuration register, each configuration register stores information for routing the packet around a failed node, wherein if the destination match has not occurred, the controller compares the information stored in the configuration register with the ID of the destination node to determine whether a failed match has occurred;

    when the failed match has occurred, the controller routes the packet to a secondary adjacent node; and

    when the failed match has not occurred, the controller routes the data packet to the adjacent node;

    wherein each configuration register in all of the nodes on each column on either side of the column of the failed node contain the column ID of the failed node, each configuration register in all of the nodes on each row on either side of the row of the failed node contain the row ID of the failed node; and

    wherein only four configuration registers contain both the row ID and the column ID of the failed node, and only the four configuration registers are enabled and all other configuration registers are disabled.

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