Direct current (DC) offset compensation method and apparatus

• US 5,898,912 A
• Filed: 07/01/1996
• Issued: 04/27/1999
• Est. Priority Date: 07/01/1996
• Status: Expired due to Term

• Current Assignee: Motorola Solutions, Inc.
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Stengel, Robert E., Heck, Joseph P.
• Primary Examiner(s): Faile, Andrew I.
• Assistant Examiner(s): ONUAKU, CHRISTOPHER O
• Application Number:
  US08/673,857
• Time in Patent Office: 1,030 Days
• Field of Search: 455/232.1, 455/234.1, 455/234.2, 455/239.1, 455/246.1, 455/247.1, 455/324, 455/310, 455/317, 455/186.1, 455/126, 455/226.1, 455/67.4, 455/226.2, 375/345, 327/307, 327/309, 327/310, 327/311, 327/551
• US Class Current: 455/234.2
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H03G 3/3052 in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H04L 25/063 Setting decision thresholds using feedback techniques only

Abstract

A receiver (300) includes input (I_in), output (V_out), forward path with filter (104, and 108), and feedback path with error amplifier (112) coupled into the forward path. Coupled to the feedback path is an error signal storage device (408, 508). A control circuit (320) responsive to input signal amplitude couples to the storage device (408, 508) and retrieves stored error signal information for use by the feedback path. During calibration, a forward path stage is stimulated with a plurality of signals of known amplitude to generate outputs (V_out). The outputs are compared to a reference to generate error signals. Error signal values are stored in memory as a function of input signal amplitude. A plurality of error signal values are stored. During operation, stage input signals are detected and compared with the plurality of signals of known amplitude. Upon detection of a match, the error signal value associated with the signal of interest is retrieved from memory and employed during DC offset compensation.

Claims

1. A receiver having an electronic circuit, the circuit comprising:

a forward transmission path having at least one gain stage for receiving an input signal and providing an output, said input signal having an amplitude, said gain stage responsive to receive a gain control signal;

a feedback path coupled into the forward transmission path and having an error amplifier for generating an error signal in response to receipt of the input signal;

a memory device coupled to the feedback path for storing a set of predetermined correction signals as a function of the gain control signal; and

a control circuit, coupled to the memory device and responsive to the gain control signal for retrieving a correction signal from the memory device for input into the feedback path to force the feedback path voltage to accurately follow a desired DC voltage.

2. A communications device having a receiver, said receiver comprising:

an amplifier having a signal input, a gain control signal input, and an output;

a down-mixing circuit, coupled to the amplifier and fed by a reference frequency;

an offset compensation circuit coupled to the down-mixing circuit comprising;

a forward transmission path for feeding a down-mixed amplifier output forward, said down-mixed amplifier output having an amplitude; and

a feedback path coupled into the forward transmission path and having an error amplifier for generating an error signal in response to a difference between the down-mixed amplifier output and a voltage reference;

a memory device coupled to the feedback path for storing a set of predetermined correction voltages as a function of gain control signal amplitude;

a control circuit, coupled to the memory device and responsive to the gain control signal for retrieving a correction voltage from the memory device for input into the feedback path to force the feedback path voltage to accurately follow a desired DC voltage; and

a detector, coupled to the amplifier, and the control circuit for detecting the gain control signal amplitude.

3. A method for providing DC offset compensation in a receiver having an offset correction loop comprising the steps of:

stimulating an amplifier with a gain control signal of known amplitude to generate an output;

comparing the output to a reference to generate an error signal;

storing a correction signal value in memory as a function of the gain control signal of known amplitude;

detecting a signal applied to the amplifier;

comparing the detected signal with the gain control signal of known amplitude;

retrieving the correction signal value from memory when the detected signal and the gain control signal of known amplitude compare; and

applying the retrieved correction signal value to the offset compensation loop to preset a loop voltage level.

4. The method of claim 3, further comprising the steps of:

stimulating the amplifier with a plurality of gain control signals of known and varying amplitudes to generate a plurality of outputs;

comparing each output to the reference to generate a plurality of error signals;

storing correction signal values in memory as a function of the corresponding gain control signal of known amplitude.

5. A method for providing DC offset compensation in a receiver having an offset compensation loop comprising the steps of:

stimulating an amplifier with a gain control signal of known amplitude to generate an output;

comparing the output to a reference to generate an error signal;

storing a correction signal value in memory as a function of the gain control signal amplitude;

thereafter,

detecting a gain control signal applied to the amplifier;

comparing the amplitude of the detected gain control signal with the amplitude of the gain control signal of known amplitude;

retrieving the correction signal value from memory when the amplitudes compare; and

applying the retrieved correction signal value to the offset compensation loop to preset a loop voltage value.