Interface structures for electronic devices

• US 5,900,674 A
• Filed: 12/23/1996
• Issued: 05/04/1999
• Est. Priority Date: 12/23/1996
• Status: Expired due to Term

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Wojnarowski, Robert John, Whitmore, Barry Scott
• Primary Examiner(s): KRASS, FREDERICK F
• Application Number:
  US08/781,972
• Time in Patent Office: 862 Days
• Field of Search: 29/829, 29/832, 156/155, 156/327, 156/345, 216/13, 216/17, 216/56, 216/65, 216/72, 361/768, 361/774, 361/795, 438/107, 438/118, 438/125, 438/598, 438/940, 428/901, 428/416, 428/418, 428/458, 428/422, 428/424.8, 428/425.5, 428/425.8, 428/462, 428/463, 428/465, 257/507, 257/669, 257/774, 257/776, 257/777, 257/778
• US Class Current: 257/774
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 2224/02125 Reinforcing structures
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05551 comprising apertures or cavities
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05559 non conformal layer on a patterned surface
• CPC Class Codes: H01L 2224/13005 Structure
• CPC Class Codes: H01L 2224/13011 comprising apertures or cavities, e.g. hollow bump
• CPC Class Codes: H01L 2224/13078 being disposed next to each other, e.g. side-to-side arrangements
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 24/02 Bonding areas on insulating substrates, e.g. chip carriers, H01L23/49816, H01L23/49838, H01L23/5389; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3511 : Warping
• CPC Class Codes: H05K 2201/0373 : Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool providing micro- or nanometer scale roughness on a metal surface H05K2203/0307
• CPC Class Codes: H05K 2201/10257 : Hollow pieces of metal, e.g. used in connection between component and PCB
• CPC Class Codes: H05K 2201/10378 : Interposers
• CPC Class Codes: H05K 3/326 : the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits H05K3/365 takes precedence
• CPC Class Codes: H05K 3/3436 : having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: H05K 3/4092 : Integral conductive tabs, i.e. conductive parts partly detached from the substrate
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product
• CPC Class Codes: Y10S 438/94 : Laser ablative material removal
• CPC Class Codes: Y10T 29/49124 : On flat or curved insulated base, e.g., printed circuit, etc.
• CPC Class Codes: Y10T 29/49126 : Assembling bases
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.

Abstract

An interface includes a surface having an electrically conductive pad; a compliant coating over the surface having a via extending to the pad; metallization patterned over the compliant coating and extending into the via; a low modulus dielectric interface layer overlying the compliant coating and having an interface via extending to the metallization; and a floating pad structure including floating pad metallization patterned over the dielectric interface layer with a first portion forming a central pad and a second portion forming an extension from the central pad extending into the interface via. Another interface includes a substrate including a low modulus dielectric interface material having a hole extending at least partially therethrough and a floating contact structure including electrically conductive material coating the hole with at least some of the floating pad metallization forming an extension from the hole. A conductive contact area interface may include an electrically conductive first contact area; an electrically conductive second contact area facing and being substantially aligned with the first contact area; and at least one interface structure coupled between the first and second contact areas and including an electrical conductor having a partially open interior to form a compliant joint between the first and second contact areas.

Claims

1. An interface comprising:

a base surface having an electrically conductive base pad;

a compliant coating over the base surface and base pad, the compliant coating having a coating via extending therethrough to the base pad;

base metallization patterned over the compliant coating and extending into the coating via;

a low modulus dielectric interface layer overlying the compliant coating and having at least one dielectric interface via extending therethrough to the base metallization; and

a floating pad structure comprising floating pad metallization patterned over the dielectric interface layer, a first portion of the floating pad metallization forming a central pad and a second portion of the floating pad metallization forming at least one extension from the central pad and extending into the at least one dielectric interface via, the floating pad structure capable of accommodating thermal and material stresses and permitting movements of the central pad independent of the base pad.

2. The interface of claim 1 wherein the base surface comprises a semiconductor chip, a passive component, a semiconductor wafer, a printed circuit board, a flexible interconnect layer structure, a photonic structure, a liquid crystal structure, or a microelectromechanical structure (MEMS).

3. The interface of claim 2 wherein the dielectric interface layer comprises a flexible epoxy or a flexible rubber.

4. The interface of claim 1 wherein the floating pad metallization includes at least two extensions from the central pad and wherein the dielectric interface layer has at least two dielectric interface vias therein, each extension extending into a respective dielectric interface via.

5. The interface of claim 4 wherein the central pad has a thickness greater than a thickness of the at least two extensions.

6. The interface of claim 4 wherein, above the base pad, the levels of the dielectric interface layer and the floating pad metallization dip.

7. The interface of claim 4 wherein the floating pad metallization further includes at least two noncoupling extensions, the at least two noncoupling extensions not extending into dielectric interface vias;

and

further including

an additional dielectric interface layer overlying the floating pad structure and having additional vias extending therethrough to the at least two noncoupling extensions; and

an additional floating pad structure comprising additional floating pad metallization patterned over the additional dielectric interface layer, a first portion of the additional floating pad metallization forming an additional central pad and a second portion of the additional floating pad metallization forming additional extensions from the central pad and extending into respective ones of the additional vias.

8. The interface of claim 4 wherein a portion of the surface not including the base pad and the floating pad structure is not covered by the compliant coating and the dielectric interface layer.

9. The interface of claim 4 wherein a solder ball or solder bump is attached to the central pad of the floating pad structure.

10. The interface of claim 4 further including:

an additional dielectric interface layer overlying the floating pad structure and having an additional via over the central pad, and

contact metallization patterned over the additional dielectric interface layer and extending into the additional via.

11. The interface of claim 10 further including a solder ball or solder bump attached to the contact metallization.

12. The interface of claim 4 further including:

an additional dielectric interface layer overlying the floating pad structure and having an additional via over the central pad, and

solder patterned over the additional dielectric interface layer and extending into the additional via.

13. The interface of claim 12 wherein the additional dielectric interface layer comprises a solder mask.

14. The interface of claim 12 further including a second additional interface dielectric layer overlying the additional interface dielectric layer and having second additional vias over the solder.

15. The interface of claim 4, wherein the interface dielectric layer has an open area situated under at least a portion of the floating pad structure.

16. An interface comprising:

a base surface having an electrically conductive base pad;

a compliant coating over the base surface and base pad, the compliant coating having a coating via extending therethrough to the base pad;

base metallization patterned over the compliant coating and extending into the coating via;

a floating pad structure situated above the base metallization and compliant coating and comprising floating pad metallization, a first portion of the floating pad metallization forming a central pad and a second portion of the floating pad metallization forming at least two extensions from the central pad, the at least two extensions being coupled to the base metallization, the floating pad structure capable of accommodating thermal and material stresses and permitting movements of the central pad independent of the base pad.

17. A method for fabricating an interface comprising the steps of:

applying a compliant coating over a base surface having an electrically conductive base pad;

forming a coating via extending in the compliant coating extending to the base pad;

applying and patterning a base metallization over the compliant coating and into the coating via;

applying a low modulus dielectric interface layer over the compliant coating;

forming at least one dielectric interface via extending through the dielectric interface layer to the base metallization; and

applying a floating pad structure comprising floating pad metallization patterned over the dielectric interface layer, a first portion of the floating pad metallization forming a central pad and a second portion of the floating pad metallization forming at least one extension from the central pad and extending into the dielectric interface via, the floating pad structure capable of accommodating thermal and material stresses and permitting movements of the central pad independent of the base pad.

18. The method of claim 17 wherein the at least one dielectric interface via comprises at least two dielectric interface vias and the at least one extension comprises at least two extensions and further including, after applying the floating pad structure, removing the dielectric interface layer.

19. The method of claim 17 wherein the at least one dielectric interface via comprises at least two dielectric interface vias and the at least one extension comprises at least two extensions and further including, after applying the floating pad, removing at least a portion of the dielectric interface layer under the floating pad structure.

20. The method of claim 19 further including the step of filling an area under the floating pad structure wherein the at least a portion of the dielectric interface layer was removed with a filler material.

21. An interface comprising:

a substrate including a low modulus dielectric interface material having at least one hole extending at least partially therethrough; and

a metallized floating pad contact structure comprising electrically conductive material coating the at least one hole, at least some of the metallized floating pad contact structure forming at least one extension from the at least one hole.

22. The interface of claim 21 further comprising:

an electrically conductive pin connected to a support structure and situated in the at least one hole, and

solder coupling the electrically conductive pin and the floating contact structure.

23. The interface of claim 22 wherein the substrate further includes a rigid material surrounding the low modulus dielectric interface material.

24. The interface of claim 22 wherein the substrate comprises a printed circuit board or a flexible interconnect layer structure.

25. The interface of claim 24 wherein the dielectric interface material comprises a flexible epoxy or a flexible rubber.

26. The interface of claim 21 wherein the floating pad metallization includes at least two extensions from the central pad.

27. The interface of claim 21 wherein the at least one hole extends partially through the substrate.

28. The interface of claim 27 wherein the substrate further comprises substrate pad metallization situated on an opposite surface of the at least one hole and further comprising:

an electrically conductive pin connected to a support structure and situated in the at least one hole;

solder coupling the electrically conductive pin and the floating contact structure;

a surface having a surface metallization pad thereon; and

solder coupling the substrate pad metallization pad and the surface metallization pad.