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Computer graphics circuit

  • US 5,900,881 A
  • Filed: 11/20/1996
  • Issued: 05/04/1999
  • Est. Priority Date: 03/22/1995
  • Status: Expired due to Term
First Claim
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1. A computer graphics circuit comprising a span processor for polygon filling by means of interpolation of coordinates and surface-normals defined at each polygon vertex, memory devices storing bump-normals and texture pattern, a bump-mapping circuit, and a shading circuit to compute a shading caused by light-sources, said bump-mapped shading circuit comprising;

  • means for defining surface and light-source normals with horizontal and vertical angles relative to an eye-point axis in device coordinates, defining a bump normal with two dimensional array in a same coordinate of texture pattern and storing said bump-normal into said memory device;

    means for interpolating said coordinates and angles defined at said each polygon vertex for all insides of polygon;

    means for reading out said bump-angle from said memory device by a texture address synchronizing with interpolation of span processor;

    means for rotating said surface-angle with said bump-angle read out from said memory device;

    means for applying said rotated horizontal and vertical angles to said shading circuit employed a diffuse-reflection and a specular-reflection circuits; and

    means for multiplying an intensity obtained by said shading circuit with said texture pattern to render a shade on texture-mapped surface.

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