Structure for semiconductor package for improving the efficiency of spreading heat

• US 5,903,052 A
• Filed: 05/12/1998
• Issued: 05/11/1999
• Est. Priority Date: 05/12/1998
• Status: Expired due to Term

• Current Assignee: Industrial Technology Research Institute
• Original Assignee: Industrial Technology Research Institute
• Inventors: Chen, Lung-Tai, Chao, Chien-Chi, Chiang, Ping-Huang, Chou, Yu-Kon
• Primary Examiner(s): WILLIAMS, ALEXANDER O
• Application Number:
  US09/075,879
• Time in Patent Office: 364 Days
• Field of Search: 257/706, 257/712, 257/713, 257/717, 257/720, 257/734, 257/737, 257/735, 257/675, 257/797, 257/673, 257/676
• US Class Current: 257/706
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/367 Cooling facilitated by shape of device H01L23/38, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/207 Diameter ranges
• CPC Class Codes: H05K 2201/0373 Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool providing micro- or nanometer scale roughness on a metal surface H05K2203/0307
• CPC Class Codes: H05K 2201/10734 : Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 2201/10969 : Metallic case or integral heatsink of component electrically connected to a pad on PCB
• CPC Class Codes: H05K 2203/1178 : Means for venting or for letting gases escape
• CPC Class Codes: H05K 3/341 : Surface mounted components
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

The present invention includes a substrate having a first opening. A heat spreader is attached on the bottom surface of the substrate. The bottom side surface of the heat spreader has trench pattern. The trench pattern includes a plurality of connecting cavities and a plurality of trenches. The chip is mounted on the top side surface of the heat spreader. A supporting member is formed on the top side surface of the substrate. The space among the substrate, the chip, the heat spreader and the supporting member is encapsulated by encapsulating material. The preformed solder balls are mounted on the bottom side surface of the substrate.

Claims

1. A structure of a semiconductor package, said structure comprising:

a substrate having a conductive trace and a dielectric tape, wherein a first opening is formed in said substrate, and a plurality of second openings are formed in said dielectric tape;

a heat spreader attached to said dielectric tape;

a chip located in said first opening and attached to said heat spreader;

signal transferring means for connecting said conductive trace and said chip;

a dielectric supporting member adhered to said conductive trace;

encapsulating material filling a space between said substrate, said chip, said heat spreader and said dielectric supporting member; and

a plurality of bumps corresponding to said second openings of said dielectric tape, and connected to said conductive trace.

2. The structure of claim 1, wherein said heat spreader has connecting cavities and trenches formed on a bottom surface of said heat spreader, said trenches being used for exhausting gas generated during SMT process, said connecting cavities being used to firmly connect said package to a printed circuit board (PCB), said chip being mounted on said heat spreader and in said first opening.

3. The structure of claim 1, wherein said dielectric supporting member is formed of isolation material.

4. The structure of claim 1, wherein said dielectric supporting member is formed of metal with an isolation layer formed thereon.

5. The structure of claim 1, further comprising conductive pads formed in said substrate aligned to said second openings.

6. The structure of claim 1, wherein a scale of said conductive pads is larger than a scale of a diameter of said second opening.

7. The structure of claim 2, wherein said connecting cavities are respectively formed on said heat spreader, a portion of said trenches leading to edges of said heat spreader from said connecting cavities.

8. The structure of claim 7, wherein a further portion of said trenches being connecting between said plurality of connecting cavities.

9. A structure of a semiconductor package, said structure comprising:

A substrate having a conductive trace and a dielectric tape, wherein a first opening is formed in said substrate, and a plurality of second openings are formed in said dielectric tape;

a heat spreader attached to said dielectric tape, wherein said heat spreader has a trench pattern formed thereon;

a chip located in said first opening and attached to said heat spreader;

signal transferring means for connecting said conductive trace and said chip;

a dielectric supporting member adhered to said conductive trace;

encapsulating material filling a space between said substrate, said chip, said heat spreader and said dielectric supporting member; and

a plurality of bumps corresponding to said second openings of said dielectric tape, and connected said conductive trace.

10. The structure of claim 9, wherein said trench pattern includes connecting cavities and trenches, said trenches being formed on a bottom surface of said heat spreader, said trenches being used for exhausting gas generated during SMT process, said connecting cavities being used to firmly connect said package to a printed circuit board (PCB), said chip being mounted on said heat spreader and in said first opening.

11. The structure of claim 9, wherein said dielectric supporting member is formed of isolation material.

12. The structure of claim 9, wherein said dielectric supporting member is formed of metal with an isolation layer formed thereon.

13. The structure of claim 9, further comprising conductive pads formed in said substrate aligned to said second openings.

14. The structure of claim 9, wherein a scale of said conductive pads is larger than a scale of a diameter of said second opening.

15. The structure of claim 10, wherein said connecting cavities are respectively formed on said heat spreader, a portion of said trenches leading to edges of said heat spreader from said connecting cavities.

16. The structure of claim 15, wherein a further portion of said trenches being connecting between said plurality of connecting cavities.