Monolithically integrable frequency demodulator device

• US 5,903,187 A
• Filed: 12/30/1996
• Issued: 05/11/1999
• Est. Priority Date: 12/29/1995
• Status: Expired due to Term

• Current Assignee: Thomson Broadband Systems
• Original Assignee: Thomson Broadband Systems
• Inventors: Guitton, Xavier, Claverie, Claude
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US08/777,044
• Time in Patent Office: 862 Days
• Field of Search: 329/341, 329/342, 329/343, 455/214
• US Class Current: 329/342
• CPC Class Codes: H03D 3/14 by means of semiconductor devices having more than two electrodes
• CPC Class Codes: H03K 9/06 of frequency- or rate-modulated pulses

Abstract

Frequency modulated signals are demodulated through a limiter circuit that chops the signal to give pulses whose occurrence frequency is proportional to the instant frequency of the received signal. The invention is devoted to a new processing of those pulses. The leading edges of the pulses are time integrated. The obtained signal is then as usual, low pass filtered to give the demodulated signal. The main advantage of this new processing is that the circuit that makes this processing does not implement delay lines and can then be made as a single chips.

Claims

1. Circuit of a demodulator of a frequency-modulated signal, the instantaneous frequency of the signal varying between a minimum frequency fmin and a maximum frequency fmax, the circuit having at least one input receiving an input signal formed by a train of pulses, each pulse having a rising edge and a falling edge, the height of a pulse of the input signal being equal to the difference between the level of the signal before a rising or falling edge and its level after this rising or falling edge, the circuit producing on an output of the circuit a signal whose instantaneous integral over time has a value proportional to the instantaneous frequency of the pulses making up the input signal, the circuit being characterized in that it carries out integration over time of the height of at least one of the edges of each pulse of the input signal of the circuit, the time of integration of the height of each integrated edge being a time τ

at most equal to 1/(2 fmax).

2. Circuit according to claim 1 wherein it includes a capacitance, the charging of which at constant current for the time τ

effects the integration of the integrated edge.

3. Circuit according to claim 2, characterized in that it includes at least one modified differential structure, the structure including at least two active elements mounted in symmetrical fashion, each active element having at least one connection, one of the connections of an active element receiving the output from a unit-gain separator stage having an input, this input being connected to a point B to which are also connected a terminal of the integration capacitance and a constant-current generator.

4. Circuit according to claim 3, wherein the two active elements are two transistors, a first and a second, each transistor having an emitter, a collector and a base.

5. Circuit according to claim 4, wherein the connection receiving the output from the unit-gain separator stage is the base of one of the transistors.

6. Circuit according to claim 4, wherein the emitters of each of the transistors are connected together at a point to which a current generator is linked.

7. Circuit according to claim 5, wherein the emitters of each of the transistors are connected together at a point to which a current generator is linked.

8. Circuit according to claim 6, wherein the common point of connection of the emitters of each of the emitters constitutes the output of the circuit.

9. Circuit according to claim 7, wherein the common point of connection of the emitters of each of the emitters constitutes the output of the circuit.

10. Circuit according to claim 6, wherein the circuit furthermore includes a current switch having an input and an output, the input of the current switch being connected to the point common to the emitters of the transistors and the output of the current switch constituting the output of the circuit.

11. Circuit according to claim 7, wherein the circuit furthermore includes a current switch having an input and an output, the input of the current switch being connected to the point common to the emitters of the transistors and the output of the current switch constituting the output of the circuit.

12. Circuit according to claim 10, wherein the current switch includes a differential structure composed of two active elements wired in symmetrical fashion.

13. Circuit according to claim 11, wherein the current switch includes a differential structure composed of two active elements wired in symmetrical fashion.

14. Circuit according to claim 12, wherein the two active elements of the current switch are two transistors each having a base, a collector, and an emitter.

15. Circuit according to claim 13, wherein the two active elements of the current switch are two transistors each having a base, a collector, and an emitter.

16. Circuit according to claim 14, wherein the emitters of the transistors of the current switch are linked together, their common connection being linked to a current generator.

17. Circuit according to claim 15, wherein the emitters of the transistors of the current switch are linked together, their common connection being linked to a current generator.

18. Circuit according to claim 16, wherein the input of the current switch is made on the base of one of the transistors, and the output on the collector of the other transistor the base of this other transistor receiving a reference voltage.

19. Circuit according to claim 17, wherein the input of the current switch is made on the base of one of the transistors, and the output on the collector of the other transistor the base of this other transistor receiving a reference voltage.

20. Circuit which comprises two differential structures, according to claim, 3 each of the two structures having the same elements as the other, wired up in the same fashion, each structure having an input and the outputs of each of the structures being linked to one another.

21. Circuit according to claim 10, wherein it includes two circuits, each of the two circuits having the same elements as the other wired up in the same fashion, each circuit having an input, the outputs of each of the circuits being linked one to the other.

22. Integrated circuit including a circuit according to claim 1.

23. Integrated circuit and capacitance together forming a circuit according to claim 1.

24. Demodulator of a frequency-modulated signal having a limiter circuit furnished with an input receiving the frequency-modulated signal and producing on at least one output (14, 14'"'"', 14") a train of pulses whose frequency of occurrence is a function of the instantaneous frequency of the input signal, a low-pass filter having an output and an input, the output carrying a signal representing the modulation carried by the frequency-modulated signal, the demodulator being characterized in that it includes a circuit according to claim 1, this circuit receiving the pulse train at the output (14, 14'"'"', 14") of the limiter circuit and feeding the low-pass filter.

25. Demodulator according to claim 24 that is embodied on an integrated circuit.

26. Demodulator, characterized in that it is embodied in part on an integrated circuit, this part and at least one capacitance connected to this part together forming a demodulator according to claim 24.