Active matrix display having pixel driving circuits with integrated charge pumps

• US 5,903,248 A
• Filed: 04/11/1997
• Issued: 05/11/1999
• Est. Priority Date: 04/11/1997
• Status: Expired due to Term

• Current Assignee: SpatiaLight, Inc.
• Original Assignee: SpatiaLight, Inc.
• Inventors: Irwin, Dean S.
• Primary Examiner(s): Saras, Steven J.
• Assistant Examiner(s): LEWIS, DAVID LEE
• Application Number:
  US08/838,917
• Time in Patent Office: 760 Days
• Field of Search: 345/87-104, 345/211
• US Class Current: 345/90
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0871 with level shifting
• CPC Class Codes: G09G 3/2011 by amplitude modulation
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes

Abstract

A pixel driving circuit (400) receives a signal voltage VA from a column bus (403) and generates therefrom, a back plate electrode voltage VB which is approximately twice that of a signal voltage VA. Included in the pixel driving circuit (400) are three transistors (402, 407 and 408) and a storage capacitor (404). During a first time period, two of the three transistors turn on to charge up or discharge the storage capacitor to the signal voltage VA, while the third transistor (407) is turned off, and during a second time, the third transistor (407) is turned on to effectively double the voltage provided to the back plate electrode, while the other two of the three transistors are turned off.

Claims

1. A circuit for providing a back plate voltage to a back plate electrode of a pixel in an active matrix display, such that said back plate voltage is approximately twice that of a signal voltage indicative of a desired display level for said pixel, said circuit comprising:

a storage capacitor having first and second ends, said storage capacitor first end coupled to said backplate electrode, and

switching means responsive to at least one control signal for coupling said signal voltage to said storage capacitor first end until a capacitor voltage approximately equal to said signal voltage is generated across said storage capacitor, and decoupling said signal voltage from said storage capacitor first end and coupling said signal voltage to said storage capacitor second end so that said storage capacitor first end provides said back plate voltage having approximately twice the voltage of said signal voltage to said back plate electrode.

2. The circuit as recited in claim 1, said at least one control signal including a first control signal and a second control signal, wherein said switching means comprises:

a first transistor having a drain coupled to said signal voltage, a source coupled to said storage capacitor first end, and a control gate coupled to said first control signal so that said signal voltage is coupled to and decoupled from said storage capacitor first end by turning on and off said first transistor, and

a second transistor having a drain coupled to said signal voltage, a source coupled to said storage capacitor second end, and a control gate coupled to said second control signal so that said signal voltage is coupled to and decoupled from said storage capacitor second end by turning on and off said second transistor.

3. The circuit as recited in claim 2, wherein said switching means further comprises a third transistor having a drain coupled to said storage capacitor second end, a source coupled to a low voltage reference, and a control gate coupled to said first control signal such that said third transistor is turned on while said signal voltage is coupled to said storage capacitor first end, and turned off while said signal voltage is coupled to said storage capacitor second end.

4. A charge pump circuit for providing a back plate voltage to a back plate electrode of a pixel defined by said back plate electrode, a front plate electrode and a volume of liquid crystal material residing in between said back and front plate electrodes, such that said back plate voltage is approximately twice that of a signal voltage received by said charge pump circuit and indicative of a desired display level for said pixel, said charge pump circuit comprising:

a storage capacitor having first and second ends, said storage capacitor first end coupled to said backplate electrode, and

switching means responsive to at least one control signal for coupling said signal voltage to said storage capacitor first end until a capacitor voltage approximately equal to said signal voltage is generated across said storage capacitor, and decoupling said signal voltage from said storage capacitor first end and coupling said signal voltage to said storage capacitor second end so that said storage capacitor first end provides said back plate voltage having approximately twice the voltage of said signal voltage to said back plate electrode.

5. The charge pump circuit as recited in claim 4, said at least one control signal including a first control signal and a second control signal, wherein said switching means comprises:

a first transistor having a drain coupled to said signal voltage, a source coupled to said storage capacitor first end, and a control gate coupled to said first control signal so that said signal voltage is coupled to and decoupled from said storage capacitor first end by turning on and off said first transistor, and

a second transistor having a drain coupled to said signal voltage, a source coupled to said storage capacitor second end, and a control gate coupled to said second control signal so that said signal voltage is coupled to and decoupled from said storage capacitor second end by turning on and off said second transistor.

6. The charge pump circuit as recited in claim 5, wherein said switching means further comprises a third transistor having a drain coupled to said storage capacitor second end, a source coupled to a low voltage reference, and a control gate coupled to said first control signal such that said third transistor is turned on while said signal voltage is coupled to said storage capacitor first end, and turned off while said signal voltage is coupled to said storage capacitor second end.

7. A back plate structure for a liquid crystal display, comprising:

a reflective electrode,

a storage capacitor coupled to said reflective electrode, and formed substantially beneath said reflective electrode so as to be screened by said reflective electrode from incident light entering said liquid crystal display, and

switching means responsive to at least one control signal for coupling said signal voltage to said storage capacitor first end until a capacitor voltage approximately equal to said signal voltage is generated across said storage capacitor, and decoupling said signal voltage from said storage capacitor first end and coupling said signal voltage to said storage capacitor second end so that said storage capacitor first end provides said back plate voltage having approximately twice the voltage of said signal voltage to said back plate electrode, said switching means also formed substantially beneath said reflective electrode so as to be screened by said reflective electrode from incident light entering said liquid crystal display.

8. The back plate structure as recited in claim 7, said at least one control signal including a first control signal and a second control signal, wherein said switching means comprises:

a first transistor having a drain coupled to said signal voltage, a source coupled to said storage capacitor first end, and a control gate coupled to said first control signal so that said signal voltage is coupled to and decoupled from said storage capacitor first end by turning on and off said first transistor, and

a second transistor having a drain coupled to said signal voltage, a source coupled to said storage capacitor second end, and a control gate coupled to said second control signal so that said signal voltage is coupled to and decoupled from said storage capacitor second end by turning on and off said second transistor.

9. The back plate structure as recited in claim 8, wherein said switching means further comprises a third transistor having a drain coupled to said storage capacitor second end, a source coupled to a low voltage reference, and a control gate coupled to said first control signal such that said third transistor is turned on while said signal voltage is coupled to said storage capacitor first end, and turned off while said signal voltage is coupled to said storage capacitor second end.

10. A method of generating a voltage for a back plate electrode for a pixel of a liquid crystal display, comprising the steps of:

charging a storage capacitor coupled to said back plate electrode to a signal voltage, and

charging said storage capacitor to a voltage approximately twice the voltage of said signal voltage by coupling said signal voltage to a low voltage end of said storage capacitor.

11. The method as recited in claim 10, wherein said first charging step comprises the steps of:

coupling said signal voltage to the back plate coupled end of said storage capacitor, and

coupling a low reference voltage to said low voltage end of said storage capacitor.

12. The method as recited in claim 11, wherein said second charging step comprises the steps of:

decoupling said signal voltage from said back plate coupled end of said storage capacitor,

decoupling said low reference voltage from said low voltage end of said storage capacitor, and

coupling said signal voltage to said low voltage end of said storage capacitor.