Single balanced frequency downconverter for direct broadcast satellite transmissions and hybrid ring signal combiner

• US 5,903,827 A
• Filed: 12/20/1995
• Issued: 05/11/1999
• Est. Priority Date: 07/07/1995
• Status: Expired due to Term

• Current Assignee: Eudyna Devices USA, Inc. (Sumitomo Corporation)
• Original Assignee: Eudyna Devices USA, Inc. (Sumitomo Corporation)
• Inventors: Kennan, Wayne, Camargo, Edmar
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): Kincaid, Lester G.
• Application Number:
  US08/575,719
• Time in Patent Office: 1,238 Days
• Field of Search: 458/319, 458/323, 458/324, 458/325, 458/326, 458/327, 458/328, 458/333, 333/120, 330/255, 330/307, 455/313, 455/314, 327/105, 327/113, 327/355, 327/357, 327/359, 327/581, 257/287
• US Class Current: 455/326
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48257 connecting the wire to a die pad of the item
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/1423 Monolithic Microwave Integrated Circuit [MMIC]
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/19107 off-chip wires
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H01P 5/222 180° rat race hybrid rings
• CPC Class Codes: H03D 2200/0003 Rat race couplers
• CPC Class Codes: H03D 2200/0023 Balun circuits
• CPC Class Codes: H03D 2200/009 Reduction of local oscillator or RF leakage
• CPC Class Codes: H03D 7/125 with field effect transistors
• CPC Class Codes: H03D 7/14 Balanced arrangements
• CPC Class Codes: H03D 9/0675 using field effect transistors H03D9/0683 takes precedence
• CPC Class Codes: H04B 7/18523 Satellite systems for providing broadcast service to terrestrial stations, i.e. broadcast satellite service arrangements specially adapted for satellite broadcast receiving H04H40/90; picture transmission via satellite H04N1/00103; television transmission via satellite H04N7/20

Abstract

A monolithic microwave integrated circuit (MMIC) semiconductor chip, for use with a hybrid coupler, in a frequency downconverter. The chip has a first input lead for receiving a first combined input signal from the coupler, a second input lead for receiving a second combined input signal from the coupler, and an output lead. Each input signal is a microwave signal combined with a further frequency signal, and one of the microwave and further frequency signals of the first combined signal is out of phase with one of the microwave and further frequency signals of the second combined signal. A single balanced mixer has a first single ended mixer for converting the first combined signal to a first intermediate frequency signal and a second single ended mixer for converting the second combined signal to a second intermediate frequency signal. An amplifier is coupled to the first and second mixers for forming an amplified unbalanced intermediate frequency (IF) signal at the output lead representative of the first and second intermediate frequency signals.

Claims

1. A hybrid ring signal combiner comprising:

a ring conductor comprising a convex shaped portion and a concave shaped portion, first and second input ports connected, respectively, to an outer periphery of the convex portion and to an inner periphery of the concave portion, said second input passing over the convex portion, and first and second output ports connected to the concave portion on an outer periphery of the ring, each of the first and second input ports receiving a different one of a microwave frequency signal and a further frequency signal, the first and second input ports being connected at spaced apart positions to and along the ring so that first and second combined signals are formed at the first and second output ports, respectively, with each of the first and second combined signals comprising a combination of the microwave and further frequency signals but with at least one of the microwave and further frequency signals of the first signal being out of phase with the same frequency signal of the other of said first and second combined signals.

2. A circuit for use in a frequency downconverter comprising:

a passive hybrid coupler comprising first and second input leads each for receiving a different one of a microwave signal and a further frequency signal, and first and second output leads for outputting, respectively, first and second combined signals with each of the first and second combined signals comprising a combination of the microwave and further frequency signals but with at least one of the microwave and further frequency signals of one of the microwave and further signals being out of phase with the same at least one microwave and further frequency signal of the other of the first and second combined signals, said coupler comprising a convex shaped portion and a concave shaped portion, the first and second input leads connected, respectively, to the convex portion and the concave portion, said second input lead passing over the convex portion, and the first and second output leads connected to the concave portion on an outer periphery of the coupler, the first and second input and output leads each being connected at spaced apart positions to and along the coupler so that the first and second combined signals are formed at the first and second output leads, respectively; and

a monolithic microwave integrated circuit semiconductor chip comprising,

a first input port for receiving the first combined signal, a second input port for receiving the second combined signal, and an output port,

a single balanced mixer comprising a first single ended mixer for converting the first combined signal to a first intermediate frequency signal, and a second single ended mixer for converting the second combined signal to a second intermediate frequency signal, and

an amplifier for forming an amplified unbalanced intermediate frequency signal at the output port representative of said first and second intermediate frequency signals.

3. The frequency downconverter of claim 2 wherein the coupler and the chip are mounted on a common substrate and the chip is located adjacent the outer perimeter of the coupler.

4. The circuit of claim 2 wherein said amplifier comprises a first device having a first input coupled to an output of the first mixer, and a second active device having a second input coupled to an output of the second mixer, said first and second active devices each having an output connected together in common and coupled to the output port.

5. The circuit of claim 4 wherein the first and second active devices of the amplifier each comprises a field effect transistor, the first active device being arranged as a common drain device and the second active device being arranged as a common source device.