Variable frequency switching of synchronized interleaved switching converters

• US 5,905,369 A
• Filed: 10/14/1997
• Issued: 05/18/1999
• Est. Priority Date: 10/17/1996
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Ishii, Takuya, Mizutani, Yoshio
• Primary Examiner(s): STERRETT, JEFFREY L
• Application Number:
  US08/950,348
• Time in Patent Office: 581 Days
• Field of Search: 323/222, 323/272, 363/72
• US Class Current: 323/272
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel
• CPC Class Codes: H02M 3/285 Single converters with a plurality of output stages connected in parallel parallel operation of a plurality of converters in dc distribution networks H02J1/10

Abstract

The interleaved switching converter circuit of the present invention includes: a first and a second switching converter which are connected in parallel to each other; a first control driver for turning ON/OFF the first switching converter; a charger/discharger having a first and a second capacitor and alternately charging/discharging the first and the second capacitors, in response to the turn ON/OFF of the first switching converter; and a second control driver for turning ON/OFF the second switching converter in synchronism with an inversion of a difference between voltages of the first and the second capacitors.

Claims

1. An interleaved switching converter circuit comprising:

a first and a second switching converter which are connected in parallel to each other;

a first control driver for turning ON/OFF the first switching converter;

a charger/discharger having a first and a second capacitor and alternately charging/discharging the first and the second capacitors, in response to the turn ON/OFF of the first switching converter; and

a second control driver for turning ON/OFF the second switching converter in synchronism with an inversion of a difference between voltages of the first and the second capacitors.

2. An interleaved switching converter circuit comprising:

a first and a second switching converter which are connected in parallel to each other;

a first control driver generating a first drive signal for driving a switch of the first switching converter;

a charger/discharger having a first and a second capacitor, receiving the first drive signal, and alternately charging/discharging the first and the second capacitors in synchronism with the first drive signal; and

a second control driver generating a second drive signal for driving a switch of the second switching converter,

wherein the second control driver receives voltages of the first and the second capacitors and generates the second drive signal in synchronism with an inversion of a difference between the voltages of the first and the second capacitors.

3. An interleaved switching converter circuit according to claim 2, wherein the first switching converter is a switching converter operating in a critical mode in which current flows through a choke coil in a boundary mode between a continuous mode and a discontinuous mode.

4. An interleaved switching converter circuit according to claim 2, wherein each of the first and the second capacitors is discharged to a zero voltage or to the vicinity thereof within a period after the inversion of the voltage difference between the first and the second capacitors has been detected and before charging of each said capacitor is started.

5. An interleaved switching converter circuit comprising:

a number N (where N is a natural number equal to or larger than

     2) of switching converters which are connected in parallel to each other;

a k-th (where k is also a natural number and 1≦

k<

N) control driver generating a k-th drive signal for driving a switch of a k-th switching converter;

a charger/discharger having a first and a second capacitor, receiving the k-th drive signal, and alternately charging/discharging the first and the second capacitors in synchronism with the k-th drive signal; and

a (k+1)-th control driver generating a (k+1)th drive signal for driving a switch of a (k+1)-th switching converter,

wherein the (k+1)-th control driver receives voltages of the first and the second capacitors and generates the (k+1)-th drive signal in synchronism with an inversion of a difference between the voltages of the first and the second capacitors.

6. An interleaved switching converter circuit according to claim 5, wherein a level of current discharged by the charger/discharger is about (N/n-1) (where n is a natural number smaller than N and is prime with respect to N) times as high as a level of current charged by the charger/discharger at least until the difference between the voltages of the first and the second capacitors is inverted.

7. An interleaved switching converter circuit according to claim 5, wherein a level of current discharged by the charger/discharger is about (N/n-1) (where n is a natural number equal to or smaller than N/2) times as high as a level of current charged by the charger/discharger at least until the difference between the voltages of the first and the second capacitors is inverted.

8. An interleaved switching converter circuit comprising a number N (where N is an integer equal to or larger than 2) of switching converters which are connected in parallel to each other, a voltage detector for detecting an output voltage of the interleaved switching converter circuit, thereby outputting a voltage signal, an alternating current input voltage being rectified and input to each of the number N of switching converters, each said switching converter applying a direct current output voltage to a load,

wherein a first switching converter includes:

a first switch;

a first current detector for detecting current flowing across the first switch, thereby outputting a first current signal; and

a first control driver for outputting a first drive signal having a predetermined duty ratio, thereby driving the first switch,

and wherein the first control driver determines and outputs a reference current signal from the rectified alternating current input voltage and from the voltage signal, and compares the first current signal with the reference current signal, thereby determining the duty ratio of the first drive signal,

and wherein a k-th (where 1<

k≦

N) switching converter includes;

a k-th switch;

a k-th current detector for detecting current flowing across the k-th switch, thereby outputting a k-th current signal; and

a k-th control driver for outputting the k-th drive signal, thereby driving the k-th switch,

and wherein the k-th control driver has a first and second capacitor, detects a (k-1)-th drive signal of a (k-1)-th switching converter, alternately charges/discharges the first and the second capacitors in synchronism with a leading edge of the (k-1)-th drive signal, activates the k-th drive signal in synchronism with an inversion of a difference between the voltages of the first and the second capacitors, and compares the k-th current signal with the reference current signal, thereby determining a duty ratio of the k-th drive signal.

9. A switching converter controlling method, wherein two capacitors are alternately charged/discharged in response to a turn ON/OFF of a first switching converter, and a second switching converter is turned ON/OFF by comparing voltages of the two capacitors with each other.

10. A switching converter controlling method, wherein a period of a drive signal of a first switching converter is stored as a charge voltage for a capacitor, and a period of a drive signal of a second switching converter is determined based on the charge voltage of the capacitor.