High performance tachometer
DCFirst Claim
1. A high performance tachometer having an input signal indicative of the vehicular engine speed and an output display for displaying the engine speed as indicated by the input signal, the tachometer comprising in combination:
- input controls for directing the control and operation of the tachometer;
a memory device electrically connected to the input signal, the memory device storing the input signal at periodic and discrete time intervals, as directed by the input controls;
a special event detector configured to detect a certain pattern of the input signal stored in said memory device, the special event detector being further configured to halt the display of said output signal on the output display upon detection of the pattern of the input signal, said pattern indicating a predetermined event; and
a controller that is electrically connected among the input controls, the memory device, and the special event detector, the controller designed to control and synchronize the operation among the input controls, the memory device, and the special event detector.
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Abstract
A high performance tachometer for use in high performance racing vehicles, such as dragsters, is disclosed. The tachometer has an input signal indicative of the vehicular engine speed and an output display for displaying the instantaneous engine speed as indicated by the input signal. The tachometer includes input controls for directing the control and operation of the tachometer. Special features associated with the tachometer include a memory device configured to store the value of the input signal at periodic and discrete time intervals, as directed by the input controls; a special event detector configured to detect a certain predetermined event or pattern of the input signal as determined by monitoring the output of the memory device, the special event detector being further configured to halt or freeze the output display (both deflection needle and digital readout) upon detection of the predetermined event or pattern output from the memory device; a multi-stage RPM switch is included to operatively control a plurality of controlled devices. The system is designed to allow the user to program the RPM switch to operate the controlled devices at a plurality of engine speeds. In addition, an automatic starting feature is provided. The automatic starting feature of a preferred embodiment is initiated in connection with the activation of the Line-Loc switch.
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Citations
36 Claims
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1. A high performance tachometer having an input signal indicative of the vehicular engine speed and an output display for displaying the engine speed as indicated by the input signal, the tachometer comprising in combination:
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input controls for directing the control and operation of the tachometer; a memory device electrically connected to the input signal, the memory device storing the input signal at periodic and discrete time intervals, as directed by the input controls; a special event detector configured to detect a certain pattern of the input signal stored in said memory device, the special event detector being further configured to halt the display of said output signal on the output display upon detection of the pattern of the input signal, said pattern indicating a predetermined event; and a controller that is electrically connected among the input controls, the memory device, and the special event detector, the controller designed to control and synchronize the operation among the input controls, the memory device, and the special event detector. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A high performance tachometer having an input signal indicative of the vehicular engine speed and an output display for displaying the engine speed as indicated by the input signal, the tachometer comprising in combination:
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input controls for directing the control and operation of the tachometer; a memory device electrically connected to the input signal, the memory device storing the input signal at periodic and discrete time intervals, as directed by the input controls; an output signal that is indicative of the information stored within the memory device, as that information is output therefrom; a special event detector configured to detect a certain pattern of the input signal stored in said memory device, the special event detector being further configured to halt the display of said output signal on said output display upon detection of the pattern of the input signal said pattern indicating a predetermined event; triggering means for automatically indicating the start of the racing event and activating said memory in response thereto; and a controller that is electrically connected among the input controls, the memory device, and the output signal, the controller designed to control and synchronize the operation among the input controls, the memory device, and the output signal. - View Dependent Claims (22, 23, 24, 25, 26, 27)
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28. A high performance tachometer having an input signal indicative of the vehicular engine speed, the tachometer comprising in combination:
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input controls for directing the control and operation of the tachometer; a memory device electrically connected to the input signal, the memory device storing the value of the input signal at periodic and discrete time intervals, as directed by the input controls, said memory device using dynamic memory allocation to store said values; a controller that is electrically connected among the input signal, input controls, and the memory device, the controller designed to control and synchronize the operation among the input signal, input controls, and the memory device, the controller being further configured to maximize the usage of available memory space. - View Dependent Claims (29, 30, 31, 32)
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33. A high performance tachometer having an input signal indicative of the vehicular engine speed and an output display for displaying the engine speed as indicated by the input signal for a racing vehicle traveling laps around a track, comprising:
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input controls for directing the control and operation of the tachometer; a memory device electrically connected to the input signal, the memory device storing the input signal as data values at periodic and discrete time intervals, as directed by the input controls, said memory device partitioned into a plurality of pages, each of said pages storing a single racing event; an output signal that is indicative of the information stored within the memory device, as that information is output therefrom; a controller that is electrically connected among the input controls, the memory device, and the output signal, the controller designed to control and synchronize the operation among the input controls, the memory device, and the output signal; and lap timing means for providing a lap signal at the completion of a lap, said controller inserting a mark in said memory device in response thereto.
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34. A high performance tachometer having an input signal indicative of the vehicular engine speed and an output display for displaying the engine speed as indicated by the input signal, the tachometer comprising in combination:
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input controls for directing the control and operation of the tachometer; a memory device electrically connected to the input signal, the memory device storing the input signal at periodic and discrete time intervals, as directed by the input controls; a special event detector configured to detect a certain pattern of the input signal as said pattern occurs and placing a mark in memory upon detection of said pattern, the special event detector being further configured to halt the display of said output signal on the output display upon detection of said mark in memory said mark indicating a predetermined event; and a controller that is electrically connected among the input controls, the memory device, and the special event detector, the controller designed to control and synchronize the operation among the input controls, the memory device, and the special event detector.
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35. A high performance tachometer having an input signal indicative of the vehicular engine speed and an output display for displaying the engine speed as indicated by the input signal, the tachometer comprising in combination:
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input controls for directing the control and operation of the tachometer; a memory device electrically connected to the input signal, the memory device the input signal at periodic and discrete time intervals, as directed by the input controls; an output signal that is indicative of the information stored within the memory device, as that information is output therefrom; a special event detector configured to detect a certain pattern of the input signal as said pattern occurs and placing a mark in memory upon detection of said pattern, the special event detector being further configured to halt the display of said output signal on the output display upon detection of said mark in memory said mark indicating a predetermined event; triggering means for automatically indicating the start of the racing event and activating said memory in response thereto; and
a controller that is electrically connected among the input controls, the memory device, and the output signal, the controller designed to control and synchronize the operation among the input controls, the memory device, and the output signal.
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36. A high performance tachometer having an input signal indicative of the vehicular engine speed and an output display for displaying the engine speed as indicated by the input signal, comprising in combination:
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a memory device electronically connected to said input signal, said memory storing the value of said input signal during the racing event; input controls for directing the control and operation of the tachometer; triggering means for automatically indicating the start of the racing event and activating said memory in response thereto; playback means for displaying said value of said input signal over said racing event on said output display; a controller that is electrically connected among the input controls, the memory device, playback means, and the triggering means, said controller controlling and synchronizing the operation of the input controls, memory device, playback means, and triggering means.
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Specification