Picture decoding and encoding method and apparatus for controlling processing speeds

• US 5,905,534 A
• Filed: 04/12/1995
• Issued: 05/18/1999
• Est. Priority Date: 07/12/1993
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Fukuyama, Takashi, Sumihiro, Hiroshi, Emoto, Seiichi
• Primary Examiner(s): TRAN, THAI Q
• Application Number:
  US08/392,865
• Time in Patent Office: 1,497 Days
• Field of Search: 348/384, 348/390, 348/400-403, 348/405, 348/409-413, 348/415, 348/416, 348/699, 348/407, 358/335, 358/342, 382/232, 382/233, 382/236, 382/238, 386/109, 386/111, 386/112
• US Class Current: 375/240.15
• CPC Class Codes: H04N 19/423 characterised by memory arrangements H04N19/433 takes precedence
• CPC Class Codes: H04N 19/433 characterised by techniques for memory access
• CPC Class Codes: H04N 19/51 Motion estimation or motion compensation
• CPC Class Codes: H04N 19/61 in combination with predictive coding

Abstract

In accordance with this invention, in a moving picture decoding apparatus, MB (Macro Block) buffer 111 is provided to thereby absorb difference between read speed from IDCT (Inverse Discrete Cosine Transform) circuit 110 and write speed into reference frame memory 117 of motion compensating section, and DRAM writing buffer 115 is provided to thereby carry out timing adjustment between read and write operations with respect to reference frame memory 117. Namely, adder 114 adds predictive macro block signal S10 from reference frame memory 117 and output signal S9 from MB buffer 111 to write added signal into DRAM writing buffer 115. DRAM writing buffer 115 holds data for a time period until reference frame memory 117 completes preparation for write operation thereafter to write those data into reference frame memory 117. Thus, inexpensive DRAM can be used as reference frame memory. In the case where read/write speed of reference frame memory 117 is higher than speed of IDCT circuit 110, one bank 116 is provided within DRAM writing buffer 115. Thus, since read-out operation of data inputted to this bank 116 is completed before next data is incoming, when the next block data is inputted, buffer 115 is in empty state. By such implementation, memory size necessary for timing adjustment buffer can be reduced. Thus, reduction of hardware scale can be realized.

Claims

1. A picture decoding method of decoding a coded picture signal encoded by using predictive encoding and Discrete Cosine Transform (hereinafter simply referred to as DCT) processing,

the method comprising the steps of:

implementing Inverse Discrete Cosine Transform (hereinafter simply referred to as IDCT) processing to DCT coefficients;

storing the IDCT processed data into a first buffer;

adding a predictive picture read out from a reference memory and data read out from the first buffer to generate a decoded picture;

storing the decoded picture into a second buffer wherein the first buffer doubles as the second buffer; and

storing the decoded picture read out from the second buffer into the reference memory.

2. A picture decoding method as set forth in claim 1,

wherein the first buffer is composed of a first bank and a second bank each having capacity corresponding to at least one macro block,

the IDCT processed data being alternately written into the first and second banks at the same speed as a read-out speed of the IDCT processing in macro block units,

data stored in the first and second banks being alternately read out at the same speed as a read-out speed of the reference memory.

3. A picture decoding method as set forth in claim 1,

wherein the decoded picture is read out in synchronism with a write timing of the reference memory from the second buffer.

4. A picture decoding method as set forth in claim 1,

wherein the decoded picture is read out in synchronism with a write timing of the reference memory from the first buffer.

5. A picture decoding method of decoding a coded picture signal encoded by using predictive encoding and DCT processing,

the method comprising the steps of:

implementing IDCT processing to the DCT coefficients;

storing the IDCT processed picture data into a first buffer;

adding data read out from the first buffer and a predictive picture read out from a second buffer to generate a decoded picture wherein the first buffer doubles as the second buffer;

storing the decoded picture into a reference memory for generating the predictive picture;

reading out the predictive picture from the reference memory; and

storing the predictive picture read out from the reference memory into the second buffer.

6. A picture decoding method as set forth in claim 5,

wherein the first buffer is composed of a first bank and a second bank each having capacity corresponding to at least one macro block,

the IDCT processed picture data being alternately written into the first and second banks at the same speed as a read-out speed of the IDCT processing in macro block units,

data stored in the first and second banks being alternately read out at the same speed as a read-out speed of the reference memory.

7. A picture decoding method as set forth in claim 5,

wherein the predictive picture is read out in synchronism with a write timing of the reference memory from the second buffer.

8. A picture decoding apparatus adapted for decoding a coded picture signal encoded by predictive encoding and DCT processing,

the apparatus comprising:

IDCT means for implementing IDCT processing to DCT coefficients;

a first buffer for storing the IDCT processed data;

adding means for adding a predictive picture read out from a reference memory and data read out from the first buffer to generate a decoded picture;

a second buffer for storing the decoded picture wherein the first buffer doubles as the second buffer; and

the reference memory for storing the decoded picture read out from the second buffer.

9. A picture decoding apparatus as set forth in claim 8,

wherein the first buffer is composed of a first bank and a second bank each having capacity corresponding to at least one macro block,

the IDCT processed data being alternately stored into the first and second banks at the same speed as a read-out speed of the IDCT processing in macro blocks,

data stored in the first and second banks being alternately read out at the same speed as a read-out speed of the reference memory.

10. A picture decoding apparatus as set forth in claim 8,

wherein the decoded picture is read out in synchronism with a write timing of the reference memory from the second buffer.

11. A picture decoding apparatus as set forth in claim 8,

wherein the first buffer doubles as the second buffer and is comprised of a dual port RAM having two banks,

the apparatus including:

switching means for inputting an output of the IDCT means and an output of the adding means to either of the two banks;

the decoded picture being read out in synchronism with a write timing of the reference memory from the first buffer.

12. A picture decoding apparatus adapted for decoding a coded picture signal encoded by using predictive encoding and DCT processing,

the apparatus comprising:

IDCT means for implementing IDCT processing to the DCT coefficients;

a first buffer for storing the IDCT processed picture data;

adding means for adding data read out from the first buffer and a predictive picture read out from a second buffer to generate a decoded picture wherein the first buffer doubles as the second buffer;

a reference memory for generating the predictive picture, which is adapted to store the decoded picture; and

the second buffer for storing the predictive picture read out from the reference memory.

13. A picture decoding apparatus as set forth in claim 12,

wherein the first buffer is composed of a first bank and a second bank each having capacity corresponding to at least one macro block,

the IDCT processed picture data being alternately written into the first and second banks at the same speed of a read-out speed of the IDCT processing in macro block units,

data stored in the first and second banks being alternately read out at the same speed as a read-out speed of the reference memory.

14. A picture decoding apparatus as set forth in claim 12,

wherein the predictive picture is read out in synchronism with a write timing of the reference memory from the second buffer.

16. A picture encoding method as set forth in claim 12,

the method including the steps of:

calculating a difference between input picture data and the predictive picture,

storing the difference into a buffer; and

reading out the difference stored in the buffer as the picture data.

15. A picture encoding method using predictive encoding and DCT processing,

the method comprising the steps of:

implementing DCT processing to picture data to generate DCT coefficients;

implementing IDCT processing to the DCT coefficients;

storing the IDCT processed data into a first buffer;

adding a predictive picture read out from a reference memory and data read out from the first buffer to generate a locally decoded picture;

storing the locally decoded picture into a second buffer wherein the first buffer doubles as the second buffer; and

storing the locally decoded picture read out from the second buffer into the reference memory.

17. A picture encoding method as set forth in claim 15,

wherein the first buffer is composed of a first bank and a second bank each having capacity corresponding to at least one macro block,

the IDCT processed data being alternately written into the first and second banks at the same speed as a read-out speed of the IDCT processing in macro block units,

data stored in the first and second banks being alternately read out at the same speed as a read-out speed of the reference memory.

18. A picture encoding method as set forth in claim 15,

wherein the locally decoded picture is read out in synchronism with a write timing of the reference memory from the second buffer.

19. A picture encoding method as set forth in claim 15,

wherein

the locally decoded picture is read out in synchronism with a write timing of the reference memory from the first buffer.

20. A picture encoding method using predictive encoding and DCT processing,

the method comprising the steps of:

implementing DCT processing to picture data to generate DCT coefficients;

implementing IDCT processing to the DCT coefficients;

storing the IDCT processed picture data into a first buffer;

adding data read out from the first buffer and a predictive picture read out from a second buffer to generate a locally decoded picture wherein the first buffer doubles as the second buffer;

storing the locally decoded picture into a reference memory for generating the predictive picture;

reading out the predictive picture from the reference memory; and

storing the predictive picture read out from the reference memory into the second buffer.

21. A picture encoding method as set forth in claim 20, which includes the steps of:

calculating a difference between input picture data and the predictive picture;

storing the difference into a buffer;

reading out the difference stored in the buffer as the picture data.

22. A picture encoding method as set forth in claim 20,

wherein the first buffer is composed of a first bank and a second bank each having capacity corresponding to at least one macro block,

the IDCT processed picture data being alternately written into the first and second banks at the same speed as a read-out speed of the IDCT processing in macro block units,

data stored in the first and second banks being alternately read out at the same speed as a read-out speed of the reference memory.

23. A picture encoding method as set forth in claim 20,

wherein the predictive picture is read out in synchronism with a write timing of the reference memory from the second buffer.

24. A picture encoding apparatus using predictive encoding and DCT processing,

the apparatus comprising:

DCT means for implementing DCT processing to picture data to generate DCT coefficients;

IDCT means for implementing IDCT processing to the DCT coefficients;

a first buffer for storing the IDCT processed data;

adding means for adding a predictive picture read out from a reference memory and data read out from the first buffer to generate a locally decoded picture;

a second buffer for storing the locally decoded picture wherein the first buffer doubles as the second buffer; and

the reference memory for storing the locally decoded picture read out from the second buffer.

25. A picture encoding apparatus as set forth in claim 24, which includes:

means for calculating a difference between input picture data and the predictive picture; and

a buffer for storing the difference;

the DCT processing means being operative to implement DCT processing to a difference read out from the buffer.

26. A picture encoding apparatus as set forth in claim 24,

wherein the first buffer is composed of a first bank and a second bank each having capacity corresponding to at least one macro block,

the IDCT processed data being alternately written into the first and second banks at the same speed as a read-out speed of the IDCT processing in macro block units,

data stored in the first and second banks being alternately read out at the same speed as a read-out speed of the reference memory.

27. A picture encoding apparatus as set forth in claim 24,

wherein the locally decoded picture is read out in synchronism with a write timing of the reference memory from the second buffer.

28. A picture encoding apparatus as set forth in claim 24,

wherein the first buffer is comprised of a dual port RAM having two banks,

the apparatus including:

switching means for inputting an output of the IDCT means and an output of the adding means to either of the two banks,

the decoded picture being read out in synchronism with a write timing of the reference memory from the first buffer.

29. A picture encoding apparatus using predictive encoding and DCT processing,

the apparatus comprising:

DCT means for implementing DCT processing to picture data to generate DCT coefficients;

IDCT means for implementing IDCT processing to the DCT coefficients;

a first buffer for storing the IDCT processed picture data;

adding means for adding data read out from the first buffer and a predictive picture read out from a second buffer to generate a locally decoded picture wherein the first buffer doubles as the second buffer;

a reference memory for generating the predictive picture, which is adapted to store the locally decoded picture; and

a second buffer for storing the predictive picture read out from the reference memory.

30. A picture encoding apparatus as set forth in claim 29,

the apparatus comprising:

means for calculating a difference between input picture data and the predictive picture; and

a buffer for storing the difference,

the DCT means being operative to implement DCT processing to a difference read out from the buffer.

31. A picture encoding apparatus as set forth in claim 29,

wherein the first buffer is composed of a first bank and a second bank each having capacity corresponding to at least one macro block,

the IDCT processed picture data being alternately written into the first and second banks at the same speed as a read-out speed of the IDCT processing in macro block units,

data stored in the first and second banks being alternately read out at the same speed as a read-out speed of the reference memory.

32. A picture encoding apparatus as set forth in claim 29,

wherein the predictive picture is read out in synchronism with a write timing of the reference memory from the second buffer.