Smart arbitration for non-symmetric data streams
First Claim
1. A method of selecting a data stream in an access to a shared bus in a computer system, the method comprising the steps of:
- (a) requesting access to the shared bus to transmit data over the shared bus;
(b) receiving a request grant signal granting access to transmit data over the shared bus;
(c) determining which of either a first data stream or a second data stream is a higher priority data stream, the determining step occurring after the receiving step; and
(d) selecting the higher priority data stream to access the shared bus.
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Accused Products
Abstract
A method and apparatus for selecting a data stream in an access to a shared bus in a computer system. The method begins by requesting access to the shared bus. An evaluation of whether a first or a second data stream is a higher priority data stream is performed after the access request. The higher priority stream is selected to access the shared bus. A bus agent implementing this method includes a data stream selector coupled to receive a plurality of data streams. Bus cycle generation circuitry is coupled to a bus request line and a bus grant line. A priority evaluation circuit coupled to the data stream selector and the bus cycle generation circuitry is configured to control selection of one of the plurality of data streams based on a priority selection.
32 Citations
23 Claims
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1. A method of selecting a data stream in an access to a shared bus in a computer system, the method comprising the steps of:
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(a) requesting access to the shared bus to transmit data over the shared bus; (b) receiving a request grant signal granting access to transmit data over the shared bus; (c) determining which of either a first data stream or a second data stream is a higher priority data stream, the determining step occurring after the receiving step; and (d) selecting the higher priority data stream to access the shared bus. - View Dependent Claims (2, 5, 6)
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3. The method of claim 3 wherein the first data stream is a higher bandwidth data stream, and wherein step (d) further comprises the steps of:
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(i) selecting the higher bandwidth data stream if the actual latency is greater than the nominal latency; and (ii) alternating between the first data stream and the second data stream if the actual latency is less than the nominal latency. - View Dependent Claims (4)
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7. A method of selecting a data stream to access a bus from a first data stream and a second data stream, the first data stream having a substantially higher bandwidth than the second data stream, the method comprising the steps of:
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(a) requesting access to transmit data over the bus using a bus request signal; (b) tracking with a timer an actual access latency until access to transmit data over the bus is granted; (c) comparing the actual access latency to a nominal latency; (d) selecting the first data stream if the actual access latency is greater than the nominal latency; and (e) alternating between the first and the second data streams if the actual access latency is not greater than the nominal latency.
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8. A bus agent comprising:
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a data stream selector coupled to receive a plurality of data streams; bus cycle generation circuitry coupled to a bus request signal line and a bus grant signal line; a priority evaluation circuit coupled to the data stream selector and the bus cycle generation circuitry and which makes a priority selection from the plurality of data streams after a bus request signal requesting access to transmit data on the bus is generated on the bus request signal line. - View Dependent Claims (9, 10, 11, 12)
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13. A bus agent in a computer system, the bus agent comprising:
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a first buffer coupled to buffer data for a first data stream, the first buffer having a first remaining time before the first data stream exhausts the first buffer; a second buffer coupled to buffer data for a second data stream, the second buffer having a second remaining time before the second data stream exhausts the second buffer; an arbitration circuit, coupled to the first buffer and the second buffer, the arbitration circuit granting access to a computer system bus to either the first buffer or the second buffer when a bus grant signal which grants access to transmit data over the computer system bus is received, depending on whether the first remaining time or the second remaining time is a smaller remaining time at the time the bus grant signal is received. - View Dependent Claims (14, 15)
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16. A computer system comprising:
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a central bus arbiter coupled to control a shared bus, coupled to receive a bus request signal to request access to the shared bus to transmit data, and coupled to generate a bus grant signal; a processor coupled to the central bus arbiter; a main memory coupled to the central bus arbiter and the shared bus; a bus agent which generates the bus request signal and receives the bus grant signal, the bus agent comprising; a data selector coupled to select from a plurality of data streams, one of the plurality of data streams being a higher bandwidth data stream than the other data streams; and a priority evaluation circuit coupled to the data selector and the bus cycle generation circuit and which makes a priority selection from the plurality of data streams after the bus request signal is generated. - View Dependent Claims (17, 18, 19, 20)
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21. A computer system comprising:
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a central bus arbiter coupled to control a shared bus, coupled to receive a bus request signal, and coupled to generate a bus grant signal; a processor coupled to the central bus arbiter; a main memory coupled to the central bus arbiter and the shared bus the main memory containing a plurality of pages and a plurality of page descriptors; a bus agent which generates the bus request signal and receives the bus grant signal, the bus agent receiving data from a video capture input and comprising; a data selector coupled to select from a plurality of data streams, one of the plurality of data streams being a higher bandwidth data stream than the other data streams, the data stream selector selecting the higher bandwidth data stream if the actual latency is greater than the nominal latency and alternating between the plurality of data streams if the actual latency is not greater than the nominal latency; a plurality of buffers coupling the plurality of data streams to the data selector, the plurality of buffers comprising; a video buffer which contains a plurality of video data elements received from the video capture input; and a control buffer which contains a subset of the plurality of page descriptors, the subset defining a virtual frame buffer; a priority evaluation circuit coupled to the data selector and the bus cycle generation circuit and configured to control selection of one of the plurality of data streams based on a priority selection, the priority evaluation circuit comprising; a latency timer coupled to track an actual latency between the bus request signal and the bus grant signal; and a latency comparator coupled to compare the actual latency to a nominal latency, the latency comparator being controllingly coupled to the data selector.
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22. A computer system having a bus, the computer system comprising:
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a plurality of bus agents coupled to generate a plurality of bus request signals and a plurality of data stream status indicators, each of the plurality of bus agents being coupled to receive one of a plurality of bus grant signals each indicating that a respective bus agent can access the bus; a bus controller coupled to receive the plurality of bus request signals and the plurality of data stream status indicators, the bus controller providing a bus grant signal to allow to one of the plurality of bus agents which has a data stream status indicating a highest priority at the time the grant signal is generated to transmit data over the bus. - View Dependent Claims (23)
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Specification