Semiconductor device having plural chips with the sides of the chips in face-to-face contact with each other in the same crystal plane
First Claim
1. A semiconductor device comprising plural semiconductor chips in each of which semiconductor elements are to be formed on a semiconductor substrate surface so that each element is formed on the same surface side, wherein said plural chips are combined with their sides kept in face-contact to each other in the same {111} crystal plane to form a sheet of wafer, wherein all contact surfaces of said plural chips are each formed of a {111} crystal plane and all contacts of the contact surfaces are formed such that the {111} crystal planes are in direct contact with each other, and wherein said {111} crystal plane contact surface of each of said plural chips is established over the total length of the thickness of said chip such that said {111} crystal plane contact surface of each chip is flat over the total length of the thickness of said chip.
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Accused Products
Abstract
Prevention of reduction in the production yield due to the increase in the area of a semiconductor chip permits a sophisticated-performance single-chip semiconductor device to be fabricated. This also permits a many-kind small-amount production of semiconductor devices to be implemented. After plural semiconductor chips 2 and 3 are fabricated separately, only defect-free chips of them are selected. The selected defect-free chips are connected in contact between their side walls of their densest faces of atoms of their substrates so that the surfaces 4a and 4b where elements are to be formed are located in the same plane. Thus, even when the chip area is increased, reduction of the production yield can be prevented, thereby permitting a large-area sophisticated-performance single chip semiconductor device to be fabricated. If many kinds of semiconductor chips are prepared and connected in their combination in a variety of forms, it is possible to realize a many-kind small-amount production of semiconductor devices.
126 Citations
32 Claims
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1. A semiconductor device comprising plural semiconductor chips in each of which semiconductor elements are to be formed on a semiconductor substrate surface so that each element is formed on the same surface side, wherein said plural chips are combined with their sides kept in face-contact to each other in the same {111} crystal plane to form a sheet of wafer, wherein all contact surfaces of said plural chips are each formed of a {111} crystal plane and all contacts of the contact surfaces are formed such that the {111} crystal planes are in direct contact with each other, and wherein said {111} crystal plane contact surface of each of said plural chips is established over the total length of the thickness of said chip such that said {111} crystal plane contact surface of each chip is flat over the total length of the thickness of said chip.
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2. A semiconductor device comprising plural semiconductor chips in each of which semiconductor elements are to be formed on semiconductor substrate surface so that each element is formed on the same surface side, wherein said plural chips are combined with their sides having the same inclination angle kept in face-connection with each other in the same {111} crystal plane to form a sheet of wafer, and wherein all contact surfaces of said plural chips are each formed of a {111} crystal plane and all contacts of the contact surfaces are formed such that the {111} crystal planes are in direct contact with each other, and wherein said {111} crystal plane contact surface of each of said plural chips is established over the total length of the thickness of said chip such that said {111} crystal plane contact surface of each chip is flat over the total length of the thickness of said chip.
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3. A semiconductor device comprising plural semiconductor chips in each of which semiconductor elements are to be formed on a semiconductor substrate surface so that each element is formed on the same surface side, wherein said plural chips are combined with their sides having the same {111} crystal plane kept in face-connection to form a sheet of wafer, and wherein all contact surfaces of said plural chips are each formed of a {111} crystal plane and all contacts of the contact surfaces are formed such that the {111} crystal planes are in direct contact with each other, and wherein said {111} crystal plane contact surface of each of said plural chips is established over the total length of the thickness of said chip such that said {111} crystal plane contact surface of each chip is flat over the total length of the thickness of said chip.
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4. A semiconductor device comprising plural semiconductor chips in each of which semiconductor elements are to be formed on a semiconductor substrate surface so that each element is formed on the same surface side, wherein said plural chips are combined with their sides kept in face-contact to each other in the same {111} crystal plane to form a sheet of wafer, and a pad plate is arranged on the back surface opposite to the surface on which elements are to be formed, and wherein all contact surfaces of said plural chips are each formed of a {111} crystal plane and all contacts of the contact surfaces are formed such that the {111} crystal planes are in direct contact with each other, and wherein said {111} crystal plane contact surface of each of said plural chips is established over the total length of the thickness of said chip such that said {111} crystal plane contact surface of each chip is flat over the total length of the thickness of said chip.
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5. A semiconductor device comprising plural kinds of semiconductor chips combined with their sides kept in face-contact to each other in the same {111} crystal plane to form a sheet of wafer, wherein said plural semiconductor chips are selected from the group consisting of chips having a central processing function, a storage function and an arithmetic function, incorporating a light receiving element and an light emitting element, having a sensor function, constituting a mere electric signal transmission means between the chips and having a movable portion, respectively, and wherein all contact surfaces of said plural chips are each formed of a {111} crystal plane and all contacts of the contact surfaces are formed such that the {111} crystal planes are in direct contact with each other, and wherein said {111} crystal plane contact surface of each of said plural chips is established over the total length of the thickness of said chip such that said {111} crystal plane contact surface of each chip is flat over the total length of the thickness of said chip.
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6. A semiconductor device comprising plural kinds of semiconductor chips combined with their sides kept in face-contact to each other in the same {111} crystal plane, wherein the atoms of substrate material on the contact face are coupled with each other directly or through oxygen atoms, and wherein all contact surfaces of said plural chips are each formed of a {111} crystal plane and all contacts of the contact surfaces are formed such that the {111} crystal planes are in direct contact with each other, and wherein said {111} crystal plane contact surface of each of said plural chips is established over the total length of the thickness of said chip such that said {111} crystal plane contact surface of each chip is flat over the total length of the thickness of said chip.
- 7. A semiconductor device comprising a semiconductor element and a semiconductor substrate having a concave portion or a penetrating portion in which the semiconductor element fits, wherein the side walls of the semiconductor element which constitute at least one fitting face and that of the semiconductor substrate having the same {111} crystal plane, wherein an entire side wall of the concave portion in the substrate and an entire side wall of the element which fits in said concave portion are formed of a {111} crystal plane, and said concave portion of the substrate is identical in shape with the element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of each of said plural chips is established over the total length of the thickness of said chip such that said {111} crystal plane contact surface of each chip is flat over the total length of the thickness of said chip.
- 10. A semiconductor device comprising plural semiconductor elements and a semiconductor substrate having plural concave portions or penetrating portions in which the respective semiconductor elements fit, wherein the sides of the semiconductor element constituting at least one fitting face of plural fitting faces and that of the semiconductor substrate having the same {111} crystal plane, wherein an entire side wall of the concave portion in the substrate and an entire side wall of the element which fits in said concave portion are formed of a {111} crystal plane, and said concave portion of the substrate is identical in shape with the element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of each of the elements is established over the total length of the thickness of the element such that said {111} crystal plane contact surface of each element is flat over the total length of the thickness of said element.
- 13. A semiconductor device comprising a semiconductor substrate having at least one groove or penetrating portion with its sides in a {111} crystal plane, a semiconductor element having sides in the {111} crystal plane fit in the groove or penetrating portion, and a wiring of electrically connecting the semiconductor element with the semiconductor substrate, wherein an entire side wall of the groove or penetrating portion in the substrate and an entire side wall of the element which fits in the groove or penetrating portion are formed of a {111} crystal plane contact surface, and the groove or penetrating portion of the substrate is identical in shape with the element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of the groove or penetrating portion and the semiconductor element is established over the total length of the thickness of the groove or penetrating portion and the semiconductor element such that said {111} crystal plane contact surface is flat over the total length of the thickness of the groove or penetrating portion and the semiconductor element.
- 15. A semiconductor device comprising a semiconductor substrate having plural grooves or penetrating portions each with its sides in a {111} crystal plane, a plurality of semiconductor elements each with its sides in the {111} crystal plane fit in the one of the grooves or penetrating portions and a wiring of electrically connecting the semiconductor elements with the semiconductor substrate, wherein an entire side wall of each groove or penetrating portion in the substrate and an entire side wall of each semiconductor element which fits in the groove or penetrating portion are formed of a {111} crystal plane contact surface, and the groove or penetrating portion of the substrate is identical in shape with the element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of the groove or penetrating portion and the semiconductor element is established over the total length of the thickness of the groove or penetrating portion and the semiconductor element such that said {111} crystal plane contact surface is flat over the total length of the thickness of the groove or penetrating portion and the semiconductor element.
- 17. A semiconductor device comprising a semiconductor substrate having plural grooves or penetrating portions, each with its sides in a {111} crystal plane, having different sizes and thicknesses, a plurality of semiconductor elements each with its sides in the {111} crystal plane fit in one of the grooves or penetrating portions, and a wiring of connecting the semiconductor elements with the semiconductor substrates, wherein an entire side wall of the groove or penetrating portion in the substrate and an entire side wall of the semiconductor element which fits in the groove or penetrating portion are formed of a {111} crystal plane contact surface, and the groove or penetrating portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of the groove or penetrating portion and the semiconductor element is established over the total length of the thickness of the groove or penetrating portion and the semiconductor element such that said {111} crystal plane contact surface is flat over the total length of the thickness of the groove or penetrating portion and the semiconductor element.
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19. A semiconductor device comprising a semiconductor substrate having at least one groove or penetrating portion with its sides in a {111} crystal plane, a semiconductor element with its sides in the {111} crystal plane fit in the groove or penetrating portion, wherein the semiconductor element is connected with the semiconductor substrate by direct bonding by thermal oxidation without using bonding agent, wherein an entire side wall of the groove or penetrating portion in the substrate and an entire side wall of the semiconductor element which fits in the groove or penetrating portion are formed of a {111} crystal plane contact surface, and the groove or penetrating portion of the substrate is identical in shape with the element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of the groove or penetrating portion and the semiconductor element is established over the total length of the thickness of the groove or penetrating portion and the semiconductor element such that said {111} crystal plane contact surface is flat over the total length of the thickness of the groove or penetrating portion and the semiconductor element.
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20. A semiconductor device comprising a semiconductor substrate having at least one groove or penetrating portion with its sides in a {111} crystal plane, a semiconductor element with its sides in the {111} crystal plane fit in the groove or penetrating portion and a wiring of electrically connecting the semiconductor elements with the semiconductor substrate, wherein said wiring connects electrodes provided on the semiconductor element and semiconductor substrate by means of wirings, wherein an entire side wall of the groove or penetrating portion in the substrate and an entire side wall of the semiconductor element which fits in the groove or penetrating portion are formed of a {111} crystal plane contact surface, and the groove or penetrating portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of the groove or penetrating portion and the semiconductor element is established over the total length of the thickness of the groove or penetrating portion and the semiconductor element such that said {111} crystal plane contact surface is flat over the total length of the thickness of the groove or penetrating portion and the semiconductor element.
- 21. A semiconductor device comprising a semiconductor substrate having plural groove or penetrating portions each with its sides in a {111} crystal plane, a plurality of semiconductor elements each with its sides in the {111} crystal plane, each fit in each of the groove or penetrating portions and a wiring of electrically connecting the plurality of semiconductor elements with the semiconductor substrate, wherein said wiring is a multi-layer inter-element wiring connecting the semiconductor elements with each other and covered with a multi-layer insulating film, wherein an entire side wall of the groove or penetrating portion in the substrate and an entire side wall of the element which fits in the groove or penetrating portion are formed of a {111} crystal plane contact surface, and the groove or penetrating portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of the groove or penetrating portion and the semiconductor element is established over the total length of the thickness of the groove or penetrating portion and the semiconductor element such that said {111} crystal plane contact surface is flat over the total length of the thickness of the groove or penetrating portion and the semiconductor element.
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23. A semiconductor device comprising a semiconductor substrate having at least one groove or penetrating portion with its sides in a {111} crystal plane in its both front and back surfaces, a semiconductor element with its sides in the {111} crystal plane fit in the groove or penetrating portion from the front and back surfaces, a wiring of electrically connecting the semiconductor element with the semiconductor substrate and an insulating film for covering the semiconductor substrate, semiconductor element and wiring, wherein an entire side wall of the groove or penetrating portion in the substrate and an entire side wall of the semiconductor element which fits in the groove or penetrating portion are formed of a {111} crystal plane contact surface, and the groove or penetrating portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein said {111} crystal plane contact surface of the groove or penetrating portion and the semiconductor element is established over the total length of the thickness of the groove or penetrating portion and the semiconductor element such that said {111} crystal plane contact surface is flat over the total length of the thickness of the groove or penetrating portion and the semiconductor element.
- 24. A semiconductor device wherein a defective area of a semiconductor element formed on the semiconductor substrate is removed to form at least one concave portion with its sides in a {111} crystal plane or penetrate through the substrate, and a defect-free element with its sides in the {111} crystal plane fit in the removed area is embedded in the removed area, wherein an entire side wall of the concave portion in the substrate and an entire side wall of the element which fits in said concave portion are formed of a {111} crystal plane contact surface, and said concave portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein the {111} crystal plane contact surface of the concave portion and the semiconductor element is established over the total length of the thickness of the concave portion and the semiconductor element such that the {111} crystal plane contact surface is flat over the total length of the thickness of the concave portion and the semiconductor element.
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26. A semiconductor device wherein an insulating film for an etching margin is formed between semiconductor elements on a semiconductor substrate, a defective area of each semiconductor element formed on the semiconductor substrate is removed to form at least one concave portion with its sides in a {111} crystal plane or penetrate through the substrate, a defect-free element with its sides in the {111} crystal plane fit in the removed area is embedded in the removed area, a wiring for electrically connecting the defect-free element substituted for the defective element with the semiconductor substrate is provided, and an insulating film for covering the semiconductor substrate, semiconductor element and wiring is provided, wherein an entire side wall of the concave portion in the substrate and an entire side wall of the element which fits in said concave portion are formed of a {111} crystal plane contact surface, and said concave portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein the {111} crystal plane contact surface of the concave portion and the semiconductor element is established over the total length of the thickness of the concave portion and the semiconductor element such that the {111} crystal plane contact surface is flat over the total length of the thickness of the concave portion and the semiconductor element.
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27. A semiconductor device wherein plural areas of defective elements in the same substrate are removed to form at least one concave portion with its sides in a {111} crystal plane or penetrate through the substrate, defect-free semiconductor elements each with its sides in the {111} crystal plane fit in the removed area are in the removed areas, a wiring for electrically connecting the defect-free elements substituted for the defective elements with the semiconductor substrate is provided, and an insulating film for covering the semiconductor substrate, defect-free semiconductor elements and wiring is provided, wherein an entire side wall of the concave portion in the substrate and an entire side wall of the element which fits in said concave portion are formed of a {111} crystal plane contact surface, and said concave portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein the {111} crystal plane contact surface of the concave portion and the semiconductor element is established over the total length of the thickness of the concave portion and the semiconductor element such that the {111} crystal plane contact surface is flat over the total length of the thickness of the concave portion and the semiconductor element.
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28. A semiconductor device wherein a defective element is formed into at least one groove with its sides in a {111} crystal plane, and a defect-free element with its sides in the {111} crystal plane fit in the depth of the groove is embedded in the groove, wherein an entire side wall of the groove in the substrate and an entire side wall of the element which fits in the groove are formed of a {111} crystal plane contact surface, and the groove of the substrate is identical in shape with the element to be fit therein in their alignment, and wherein the {111} crystal plane contact surface of the groove and the element is established over the total length of the thickness of the groove and the element such that the {111} crystal plane contact surface is flat over the total length of the thickness of the groove and the element.
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29. A semiconductor device wherein a defective element is formed into at least one concave portion with its sides in the {111} crystal plane or penetrating portion from the front and back surfaces of a substrate, and a defect-free element with its sides in the {111} crystal plane fit in the concave or penetrating portion is embedded in the groove and fixed there by bonding agent from the back surface where no element area is located, wherein an entire side wall of the concave portion or the penetrating portion in the substrate and an entire side wall of the element which fits in the concave portion or penetrating portion are formed of a {111} crystal plane contact surface, and the concave portion or the penetrating portion of the substrate is identical in shape with the element to be fit therein in their alignment and wherein the {111} crystal plane contact surface of the concave portion or penetrating portion and element is established over the total length of the thickness of the concave portion or penetrating portion and element such that the {111} crystal plane contact surface is flat over the total length of the thickness of the concave portion or penetrating portion and element.
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30. A semiconductor device wherein a defective element of semiconductor elements formed on a semiconductor substrate is formed into at least one concave portion with its sides in the {111} crystal plane or penetrating portion, and a defect-free element with its sides in the {111} crystal plane fit in the concave or penetrating portion is embedded in the portion so that the defect-free element and the surface of the semiconductor substrate are located at the same height, wherein an entire side wall of the concave portion or the penetrating portion in the substrate and an entire side wall of the element which fits in the concave portion or penetrating portion are formed of a {111} crystal plane contact surface, and the concave portion or the penetrating portion of the substrate is identical in shape with the element to be fit therein in their alignment and wherein the {111} crystal plane contact surface of the concave portion or penetrating portion and element is established over the total length of the thickness of the concave portion or penetrating portion and element such that the {111} crystal plane contact surface is flat over the total length of the thickness of the concave portion or penetrating portion and element.
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31. A semiconductor device wherein a semiconductor substrate is removed to form at least one concave portion with its octahedral sides in the {111} crystal plane or penetrate therethrough thereby to form a semiconductor element being octahedral with its sides in the {111} crystal plane fit in the removed area, a wiring for electrically connecting said semiconductor element with said semiconductor substrate, and an insulating layer for covering said semiconductor element, said semiconductor substrate and said wiring, wherein an entire side wall of the concave portion in the substrate and an entire side wall of the semiconductor element which fits in said concave portion are formed of a {111} crystal plane contact surface, and said concave portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein the {111} crystal plane contact surface of the concave portion and the semiconductor element is established over the total length of the thickness of the concave portion and the semiconductor element such that the {111} crystal plane contact surface is flat over the total length of the thickness of the concave portion and the semiconductor elements.
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32. A semiconductor device wherein a semiconductor substrate is removed to form at least one concave portion with its pentahedral sides in the {111} crystal plane or penetrate therethrough, a semiconductor element being pentahedral with its sides in the {111} crystal plane fit in the removed area, and one side of the pentahedron is used as a positioning face, wherein an entire side wall of the concave portion in the substrate and an entire side wall of the semiconductor element which fits in said concave portion are formed of a {111} crystal plane contact surface, and said concave portion of the substrate is identical in shape with the semiconductor element to be fit therein in their alignment, and wherein the {111} crystal plane contact surface of the concave portion and the semiconductor element is established over the total length of the thickness of the concave portion and the semiconductor element such that the {111} crystal plane contact surface is flat over the total length of the thickness of the concave portion and the semiconductor elements.
Specification