Chip package device mountable on a mother board in whichever of facedown and wire bonding manners

• US 5,909,055 A
• Filed: 05/27/1998
• Issued: 06/01/1999
• Est. Priority Date: 08/27/1996
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Tanaka, Yasunori, Yamashita, Koji, Hagimoto, Eiji
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Kelley, Nathan K.
• Application Number:
  US09/084,349
• Time in Patent Office: 370 Days
• Field of Search: 257/685, 257/723, 257/724, 257/784, 257/690, 257/692, 257/693, 257/678, 257/734, 257/779, 257/786, 257/778
• US Class Current: 257/693
• CPC Class Codes: H01L 2224/023 Redistribution layers [RDL] for bonding areas
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/05556 in side view
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 29/0657 : characterised by the shape of the body
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0001 : Technical content checked by a classifier
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01052 : Tellurium [Te]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10158 : at the passive surface
• CPC Class Codes: H01L 2924/10162 : with a square active surface
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H05K 1/181 : associated with surface mounted components
• CPC Class Codes: H05K 2203/049 : Wire bonding
• CPC Class Codes: H05K 3/328 : by welding
• CPC Class Codes: H05K 3/3436 : having an array of bottom contacts, e.g. pad grid array or ball grid array components

Abstract

A chip package device comprises on its outside surface a plurality of wire bonding electrodes adjacent a plurality of facedown electrodes. The chip package device comprises an IC chip having a plurality of chip electrodes on its face surface and a contact sheet having an inside surface on the face surface and comprising on the outside surface a plurality of conductor patterns which comprises portions extending through the contact sheet to the chip electrodes, respectively, and defines the facedown and the wire bonding electrodes. Such chip package devices can be mounted on a printed circuit board in whichever of a facedown and a wire bonding manner when primary and secondary pads are formed on the board for mechanical and electrical connection to the facedown electrodes, respectively, and for electric connection by bonding wires to the wire bonding electrodes, respectively.

Claims

1. A multi-chip module comprising first and second chip package devices on a printed circuit board, each of said first and said second chip package devices having a chip surface and comprising on said chip surface a plurality of facedown electrodes and a plurality of wire bonding electrodes in one-to-one correspondence to said facedown electrodes, said printed circuit board comprising a plurality of primary pads at positions corresponding to said facedown electrodes of said first and second chip package devices and a plurality of secondary pads surrounding an area identical with the chip surface of each of said first and said second chip package devices, said first chip package device being mounted facedown on said printed circuit board with said facedown electrodes brought into mechanical and electrical contact with said primary pads, respectively, said second chip package device being mounted on said printed circuit board with said chip surface directed away from said printed circuit board and with said wire bonding electrodes electrically connected by bonding wires to said secondary pads, respectively.

2. A multi-chip module as claimed in claim 1, wherein a resin mass is used to cover at least onto the wire bonding electrodes of said second chip package device, said bonding wires, and said secondary pads.

3. A multi-chip module as claimed in claim 1, each of said first and said second chip package devices having a back surface which is opposite to said chip surface and has an area substantially identical with said chip surface, wherein said printed circuit board comprises said primary pads and said secondary pads within and surrounding, respectively, each of first and second board areas which are equal to said chip and said back surfaces, respectively, and on which said first and said second chip packages are mounted, respectively.