Semiconductor device and method of making the same

• US 5,910,675 A
• Filed: 12/11/1996
• Issued: 06/08/1999
• Est. Priority Date: 12/14/1995
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Corporation
• Inventors: Narita, Kaoru, Fujii, Takeo, Horiguchi, Yoko
• Primary Examiner(s): WOJCIECHOWICZ, EDWARD JOSEPH
• Application Number:
  US08/763,513
• Time in Patent Office: 909 Days
• Field of Search: 257/370, 257/355, 257/360, 257/362, 257/378, 257/409, 257/487, 257/577
• US Class Current: 257/370
• CPC Class Codes: H01L 27/0248 for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
• CPC Class Codes: H01L 27/0635 in combination with bipolar transistors and diodes, or resistors, or capacitors

Abstract

A semiconductor device includes a metal terminal provided on a semiconductor substrate and a protection element. The protection element includes an insulated gate field-effect transistor. The transistor has a first diffusion layer of a reverse conductive-type formed on one conductive type region of the semiconductor substrate and connected to the metal terminal, as its source. The transistor also includes a second diffusion layer of a reverse conductive-type connected to an electrode wire having a constant electric potential, as its source, and has a gate electrode connected to the electrode wire. A lateral bipolar transistor includes a third diffusion layer of a reverse conductive-type formed with a constant spaced distance with respect to the second diffusion layer and connected to the metal terminal, as its collector, and also has the second diffusion layer as its emitter, and furthermore has the one conductive-type region as its base. Thus, a semiconductor device is protected from an electrostatic discharge (ESD) breakdown device even though having high density and a high operating speed.

Claims

1. A semiconductor device having a semiconductor substrate having a terminal, and a protection circuit, said protection circuit comprising:

a field-effect transistor (FET) comprising at least one first diffusion layer of a first conductive-type formed on a region of said semiconductor substrate, said region being a second conductive-type region, said at least one diffusion layer being connected to said terminal, said FET further comprising at least one second diffusion layer of said first conductive-type connected to an electrode, said electrode having a constant electric potential and said FET having a first portion of said first diffusion layer as a drain, a first portion of said second diffusion layer as a source and a gate electrode connected to said electrode; and

a bipolar transistor in which a second portion of said first diffusion layer is a predetermined distance from a second portion of said second diffusion layer, wherein said source is positioned between said second portion of the first diffusion layer and said first portion of the first diffusion layer;

said bipolar transistor including said second portion of said first diffusion layer as a collector, said second portion of said second diffusion layer as an emitter, and said second conductive-type region as a base.

2. The semiconductor device as set forth in claim 1, wherein said FET comprises an insulated gate field-effect transistor (IGFET) and said bipolar transistor comprises a lateral bipolar transistor, and

wherein said terminal comprises one of an input terminal and output terminal for connecting an external circuit to an internal circuit of said semiconductor substrate and said insulated gate field-effect transistor and said lateral bipolar transistor comprise electrostatic protection elements.

3. The semiconductor device as set forth in claim 1, wherein said FET comprises an insulated gate field-effect transistor (IGFET) and said bipolar transistor comprises a lateral bipolar transistor, and wherein said terminal is connected to one of a power supply of the semiconductor device, a ground potential and an input-output terminal,

said insulated gate field-effect transistor and said lateral bipolar transistor comprising electrostatic protection elements.

4. The semiconductor device as set forth in claim 2, wherein when an excessive input voltage is applied to said terminal, said lateral bipolar transistor is operated by an electrical charge generated due to an electrical flow between the drain and source of said insulated gate field-effect transistor.

5. The semiconductor device as set forth in claim 2, wherein said gate of said insulated gate field-effect transistor has a width less than that of said base of said lateral bipolar transistor.

6. The semiconductor device as set forth in claim 2, wherein said insulated gate field-effect transistor has a channel length greater than that of a base of said lateral bipolar transistor.

7. The semiconductor device as set forth in claim 2, wherein a first distance between ends of contact holes of said drain and said source of said insulated gate field-effect transistor is longer than a second spaced distance between ends of contact holes of said collector and said emitter of said lateral bipolar transistor.

8. The semiconductor device as set forth in claim 2, wherein said insulated gate field-effect transistor includes a channel end partially connected to said base of said lateral bipolar transistor.

9. The semiconductor device as set forth in claim 2, wherein a first distance between a channel end of said insulated gate field-effect transistor and said base of said lateral bipolar transistor is approximately 8 μ

m.

10. The semiconductor device as set forth in claim 2, wherein said second conductive-type region comprises a well layer formed on said semiconductor substrate.

11. The semiconductor device as set forth in claim 2, wherein said electrode is for discharging an excessive input voltage and is disposed around the periphery of said semiconductor substrate.

12. A semiconductor device including a semiconductor substrate having a terminal, and a protection circuit, said protection circuit comprising:

a field-effect transistor (FET) including a first diffusion layer of a first conductive-type formed on a region of said semiconductor substrate, said region being a second conductive-type region, said first diffusion layer being connected to said terminal, said first diffusion layer forming a drain of said FET, and said FET further including a second diffusion layer of said first conductive-type connected to an electrode,

said electrode having a constant electric potential, said second diffusion layer forming a source of said FET, said FET further including a gate electrode connected to said electrode, and

a bipolar transistor including a third diffusion layer of said first conductive-type positioned a predetermined distance from said second diffusion layer and said bipolar transistor being connected to said terminal, wherein said source is positioned between said third diffusion layer and said first diffusion layer,

said terminal comprising a collector of said bipolar transistor, said second diffusion layer comprising an emitter of said bipolar transistor, and said second conductive-type region comprising a base of said bipolar transistor.

13. The semiconductor device as set forth in claim 12, wherein said FET comprises an insulated-gate FET (IGFET) and said bipolar transistor comprises a lateral bipolar transistor,

said device further including a PN diode comprising a fourth diffusion layer of said first conductive-type, a first portion of said fourth diffusion layer being positioned a second predetermined distance from said third diffusion layer and a second portion of said fourth diffusion layer being connected to said electrode and said third diffusion layer.

14. A semiconductor device, comprising:

a semiconductor substrate;

a bipolar transistor formed on said substrate and including first and second diffusion layers, formed in said semiconductor substrate, for forming a collector and an emitter, respectively, a portion of said semiconductor substrate forming a base of said bipolar transistor, said collector being connected to a metal terminal and said emitter being connected to an electrode having a constant electric potential; and

a field effect transistor (FET), connected to said substrate, for actuating said bipolar transistor upon a predetermined voltage being applied to said device, said FET including a third diffusion layer as a drain, said second diffusion layer as a source and coupled to said electrode, and a gate electrode coupled to said electrode;

wherein said source is positioned between said third diffusion layer and said first diffusion layer.

15. The semiconductor device as set forth in claim 14, wherein said electrostatic protection transistor comprises a lateral bipolar transistor.

16. The semiconductor device as set forth in claim 14, wherein said semiconductor element comprises an insulated gate field-effect transistor (IGFET). diffusion layer.

17. The semiconductor device as set forth in claim 14, wherein said semiconductor element further comprises a gate control diode.