Multiple application chip card with decoupled programs
First Claim
1. A data-carrier card comprising a memory for recording a plurality of applications and a processor, the card further comprising:
- means for separating at least two of said applications in the memory, so that each application may only gain access to a specified predetermined memory area within the memory, and that access of applications outside of the specified predetermined memory area in the memory for the respective application is disabled;
said means for separating further comprising;
an application table, which has stored the information concerning an initial address A and an end address E of the memory area in which a respective application may have access; and
address-monitoring means which monitors the addresses filed on an address bus to ensure that the filed addresses locate a memory area A to E of the application in the memory which is defined by the initial address A and the end address E of the respective application, and which initiates an appropriate action when one of the addresses filed on the address bus is not located within the memory area A to E of the application in the memory;
said address-monitoring means further comprising;
address decoder means which decodes and authorizes the memory area, whereby addresses outside of the memory area are ignored.
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Accused Products
Abstract
The integration of multiple application programs on one chip card is described, whereby the application programs stored on it do not have access to each other, which is achieved through a separation and de-coupling of the individual programs from one another. A first embodiment has several mutually-independent units, consisting respectively of a processor unit and a memory unit. Communication of these independent units with the external world and also with each other takes place through a control unit. A communication of the independent units with each other can only take place through the respective processor units, so that the linked memory units may not be accessed by circumvention of the processor unit. In a further embodiment, the separation of different applications on a chip card with only one processor takes place through the insertion of a separation of the application segments in the memory area of the chip card. The separation has as a result that each application may only access one predetermined area within the memory, and that access outside of the specified memory area is disabled for this application.
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Citations
3 Claims
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1. A data-carrier card comprising a memory for recording a plurality of applications and a processor, the card further comprising:
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means for separating at least two of said applications in the memory, so that each application may only gain access to a specified predetermined memory area within the memory, and that access of applications outside of the specified predetermined memory area in the memory for the respective application is disabled;
said means for separating further comprising;an application table, which has stored the information concerning an initial address A and an end address E of the memory area in which a respective application may have access; and address-monitoring means which monitors the addresses filed on an address bus to ensure that the filed addresses locate a memory area A to E of the application in the memory which is defined by the initial address A and the end address E of the respective application, and which initiates an appropriate action when one of the addresses filed on the address bus is not located within the memory area A to E of the application in the memory;
said address-monitoring means further comprising;address decoder means which decodes and authorizes the memory area, whereby addresses outside of the memory area are ignored. - View Dependent Claims (2)
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3. A data-carrier card comprising a memory for recording a plurality of applications and a processor, the card further comprising:
means for separating at least two-of said applications in the memory, so that each application may only gain access to a specified predetermined memory area within the memory, and that access of applications outside of the specified predetermined memory area in the memory for the respective application is disabled;
wherein the means for separation further comprises;a multiplexer which is connected to a number of memory areas, whereby the individual memory areas may be dynamically selected through the multiplexer, the multiplexer further comprising; a register which may be loaded dynamically and which provides access by the processor to a memory area and which disables others of the number of memory areas.
Specification