Repair fuse circuit performing complete latch operation using flash memory cell
First Claim
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1. A repair fuse circuit of a cross-coupled latch circuit, comprising:
- a first flash memory cell coupled to a first current providing means at a first node;
at least two second flash memory cells coupled, in parallel, to a second current providing means at a second node, wherein the first and second current providing means are coupled to a power supply;
a first means for precharging the first and second nodes; and
a second means for generating a control signal to control the first means in order that the first means temporally precharges the first and second nodes,whereby the repair fuse circuit is initialized in a high logic state.
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Abstract
The present invention provides a repair fuse circuit capable of performing stable latch operation. The present invention improves the reliability of the repair fuse circuit using flash memory cells, by performing the initialization of the cross-coupled latch circuit at a high voltage level. The repair fuse circuit of a cross-coupled latch structure includes a voltage increasing element for temporally increasing voltage level of the cross-coupled latch circuit and a controller for controlling the voltage increasing element. As a result, the repair fuse circuit is initialized in a high logic state.
45 Citations
13 Claims
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1. A repair fuse circuit of a cross-coupled latch circuit, comprising:
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a first flash memory cell coupled to a first current providing means at a first node; at least two second flash memory cells coupled, in parallel, to a second current providing means at a second node, wherein the first and second current providing means are coupled to a power supply; a first means for precharging the first and second nodes; and a second means for generating a control signal to control the first means in order that the first means temporally precharges the first and second nodes, whereby the repair fuse circuit is initialized in a high logic state. - View Dependent Claims (2, 3, 4, 5)
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6. A repair fuse circuit of a cross-coupled latch circuit, comprising:
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a first flash memory cell coupled to a first current providing means at a first node; at least two second flash memory cells which are coupled, in parallel, to a second current providing means at a second node, wherein the first and second current providing means are coupled to a power supply; enable delay means for increasing a voltage level in the first and second nodes, by cutting off a current path of the cross-coupled latch circuit. - View Dependent Claims (7)
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8. A repair fuse circuit of a cross-coupled latch circuit in a flash memory device, comprising:
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a flash memory cell coupled to a first current providing means at a first node; at least two flash memory cells which are coupled, in parallel, to a second current providing means at a second node, wherein the first and second current providing means are coupled to a power supply; a voltage increasing means for temporally increasing voltage level at the first and second nodes; and a control means for controlling the voltage increasing means, whereby the repair fuse circuit is initialized in a high logic state. - View Dependent Claims (9, 10, 11, 12, 13)
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Specification