Method and apparatus for tuning a continuous time filter

• US 5,914,633 A
• Filed: 08/08/1997
• Issued: 06/22/1999
• Est. Priority Date: 08/08/1997
• Status: Expired due to Term

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Shulman, Dima David, Comino, Vittorio, Walker, Susan Jeanne
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): LE, DINH THANH
• Application Number:
  US08/906,912
• Time in Patent Office: 683 Days
• Field of Search: 327/552, 327/553, 327/554, 327/311, 333/172, 333/173, 330/303, 330/305
• US Class Current: 327/553
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 2210/021 Amplifier, e.g. transconductance amplifier
• CPC Class Codes: H03H 2210/043 by measuring time constant

Abstract

A tuning circuit for generating a digital code to be used to calibrate a capacitor array of the type used in active RC filters is comprised of a single-slope A/D converter with fixed reference voltages as inputs and an output value which is dependent on the RC product of a resistor and capacitor within the converter. A decoder converts the RC product as measured by the A/D converter into a digital code which, when applied to the appropriate capacitor array, sets the array capacitance to compensate for the difference between the measured RC product and the nominal design value.

Claims

1. A circuit combining an active RC filter and an integrating tuner wherein in a first state said circuit functions as a filter and in a second state said circuit functions as an integrating tuner and provides an output suitable for adjusting a total capacitance of an array of switched capacitors, said circuit comprising:

an amplifier having an inverting and a non-inverting input and an output;

a resistor connected between said inverting input and a first switch;

said non-inverting input connected to a first reference voltage; and

a capacitor connected between the output of the amplifier and the non-inverting input;

a pulse generator receiving the output of the amplifier as input and providing a pulse signal as output, said pulse signal having a first output signal level when the pulse generator input has a magnitude between that of a second and a third reference voltage and otherwise having a second output signal level;

a counter receiving said pulse signal as input and providing a digital count as output, said digital count having a valve proportional to the width of a pulse present in said pulse signal; and

a decoder receiving said digital count as input and providing a digital code as output;

wherein, when said circuit is in the first state, said first switch connects said resistor to a filter input, said amplifier, resistor, and capacitor comprise said active RC filter, the output of the amplifier providing a filtered version of a signal applied to said filter input; and

when said circuit is in the second state, said first switch connects said resistor to a fourth reference voltage, said amplifier, resistor, and capacitor comprise an integrator having an RC time constant defined by said resistor and capacitor, said integrator, pulse generator, counter, and decoder comprise said integrating tuner, said digital count indicating the magnitude of the RC time constant, and said digital code indicating which of said plurality of capacitors in said array of switched capacitors is to be enabled so as to tune the total capacitance of said capacitor array in accordance with said RC time constant.

2. The circuit of claim 1, further comprising a reset switch connected in parallel with said capacitor.

3. The circuit of claim 1, wherein:

said capacitor array is connected between the output of the amplifier and the non-inverting input of the amplifier;

said digital code is applied to said capacitor array to adjust the total capacitance of said capacitor array in accordance with said RC time constant; and

when in said first state, a frequency response of said active RC filter is dependent on the total capacitance of said capacitor array.

4. The circuit of claim 1, further comprising a second switch selectively connecting the output of the amplifier to said pulse generator when said circuit is in the second state.

5. The circuit of claim 1, further comprising a second switch connecting said non-inverting input to a ground voltage level when said circuit is in the first state and to said first reference voltage when said circuit is in the second state.

6. The circuit of claim 1, wherein said pulse generator comprises:

a first comparator receiving said pulse generator input and said second reference voltage as inputs and having a first comparator output;

a second comparator receiving said pulse generator input and said third reference voltage as inputs and having a second comparator output; and

a logic circuit receiving said first and second comparator outputs and generating said digital pulse output signal as its output.

7. The circuit of claim 6, wherein:

said fourth reference voltage is greater than said first reference voltage, said first reference voltage is greater than said second reference voltage, and said second reference voltage is greater than said third reference voltage;

said second reference voltage is connected to a non-inverting input of said first comparator;

said third reference voltage is connected to an inverting input of said second comparator, and

said logic circuit comprises an AND gate.

8. The tuning circuit of claim 1, wherein said first, second, third, and fourth reference voltages are generated by a voltage divider.

9. An integrated circuit combining an active RC filter and an integrating tuner, wherein in a first state said circuit functions as a filter and in a second state said circuit functions as an integrating tuner and provides an output suitable for adjusting the total capacitance of an array of switched capacitors each of which can be selectably enabled or disabled in response to a respective control signal, said circuit comprising:

an amplifier having an inverting and a non-inverting input and an output;

a resistor connected between said inverting input and a first switch;

said non-inverting input connected to a first reference voltage;

said capacitor array connected between the output of the amplifier and the non-inverting input;

a pulse generator receiving the output of the amplifier as input and providing a pulse signal as output, said pulse signal having a first output signal level when a voltage applied to said driving signal input has a magnitude between that of a second and a third reference voltage and otherwise having a second output signal level;

a counter receiving said pulse signal as input and providing a digital count as output, said digital count having a value proportional to the width of a pulse present in said pulse signal; and

a decoder receiving said digital count as input and providing a digital code as output;

wherein, when said circuit is in the first state, said amplifier, resistor, and capacitor array comprise said active RC filter, the output of the amplifier providing a filtered version of a signal applied to said filter input, a frequency response of said filter being dependent on a number of said plurality of switched capacitors which are enabled; and

when said circuit is in the second state, said switch connects said resistor to a fourth reference voltage, at least one of said switched capacitors in said capacitor array is enabled, and said amplifier, resistor, and said at least one enabled capacitor comprise an integrator having an RC time constant defined by said resistor and said at least one enabled capacitor, said integrator, pulse generator, counter, and decoder comprise said integrating tuner, said digital count indicating the magnitude of the RC time constant, said digital code indicating which of said plurality of capacitors in said array is to be enabled when the circuit is in the first state so as to adjust the frequency response of said active RC filter in accordance with said RC time constant.