Multiplier and neural network synapse using current mirror having low-power mosfets
First Claim
1. A multiplier producing a first current and a second current and then outputting a linear output current by subtracting said second current from said first current, said multiplier comprising:
- first input means having a first MOS transistor which generates said first current in response to a first input voltage, wherein said first MOS transistor operates in a nonsaturation region thereof;
a first current mirror including a plurality of MOS transistors to output said first current, being coupled to said first MOS transistor;
a second current mirror including a plurality of MOS transistors to output a second current which is out of phase with said first current;
second input means having a second MOS transistor which generates said second current in response to a second input voltage, wherein said second MOS transistor operates in a nonsaturation region thereof; and
a third current mirror including a plurality of MOS transistors to output said second current, being coupled to said second MOS transistor wherein said third current mirror is coupled to said second current mirror.
1 Assignment
0 Petitions
Accused Products
Abstract
A multiplier and a neural network synapse capable of removing nonlinear current using current mirror circuits. The multiplier produces a linear current by using MOS transistors operating in a nonsaturation region. The multiplier includes a first current mirror including a plurality of MOS transistors to form a first current and a second current mirror including a plurality of MOS transistors to form a second current, wherein the second current mirror is coupled in parallel to the first current mirror. As a result, the multiplier outputs an output current by subtracting a second current from said first current.
-
Citations
15 Claims
-
1. A multiplier producing a first current and a second current and then outputting a linear output current by subtracting said second current from said first current, said multiplier comprising:
-
first input means having a first MOS transistor which generates said first current in response to a first input voltage, wherein said first MOS transistor operates in a nonsaturation region thereof; a first current mirror including a plurality of MOS transistors to output said first current, being coupled to said first MOS transistor; a second current mirror including a plurality of MOS transistors to output a second current which is out of phase with said first current; second input means having a second MOS transistor which generates said second current in response to a second input voltage, wherein said second MOS transistor operates in a nonsaturation region thereof; and a third current mirror including a plurality of MOS transistors to output said second current, being coupled to said second MOS transistor wherein said third current mirror is coupled to said second current mirror. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A neural network synapse producing a first current and a second current and then outputting a linear output current by subtracting said second current from said first current, said multiplier comprising:
-
first input means having a first MOS transistor which generates said first current in response to a first input voltage, wherein the first MOS transistor operates in a nonsaturation region thereof; a first current mirror including a plurality of MOS transistors to output said first current, being coupled to said first MOS transistor; a second current mirror including a plurality of MOS transistors to output a second current which is out of phase with said first current; second input means having a second MOS transistor which generates said second current in response to a second input voltage, wherein said second MOS transistor operates in a nonsaturation region thereof; a third current mirror including a plurality of MOS transistors to output said second current, being coupled to said second MOS transistor, wherein said third current mirror is coupled to said second current mirror; and switching means for outputting said linear output current from said first current in response to a control signal. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15)
-
Specification