Process for producing a semiconductor device having a single thermal oxidizing step

• US 5,915,180 A
• Filed: 04/05/1995
• Issued: 06/22/1999
• Est. Priority Date: 04/06/1994
• Status: Expired due to Term

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Hara, Kazukuni, Tokura, Norihito, Kano, Hiroyuki, Miyajima, Takeshi, Fuma, Hiroo
• Primary Examiner(s): BROWN, PETER T
• Assistant Examiner(s): Oh, Edwin
• Application Number:
  US08/418,147
• Time in Patent Office: 1,539 Days
• Field of Search: 257/77, 257/627, 257/628, 257/330, 257/333, 257/339, 257/328, 437/100, 438/270, 438/268, 438/197, 438/198, 438/931
• US Class Current: 438/270
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: Y10S 438/931 Silicon carbide semiconductor

Abstract

A semiconductor device, which has an oxide laver with the thickness thereof being varied from portion to portion of the inner surface of a trench and can be easily produced, and a process of producing the same. An n⁺ type single crystal SiC substrate is formed of SiC of hexagonal system having a carbon face with a (0001) face orientation as a surface, and an n type epitaxial layer and a p type epitaxial layer are successively laminated onto the substrate. An n⁺ source region is provided within the p type epitaxial layer, and the trench extends through the source region and the epitaxial layer into the semiconductor substrate. The side face of the trench is almost perpendicular to the surface of the epitaxial layer with the bottom face of the trench having a plane parallel to the surface of the epitaxial layer. The thickness of a gate oxide layer, formed by thermal oxidation, on the bottom face of the trench is larger than the thickness of the gate oxide layer on the side face of the trench. A gate electrode layer is provided on the surface of the oxide layer, formed by thermal oxidation, within the trench, a source electrode layer is provided on the epitaxial layer and the source region, and a drain electrode layer is provided on the back surface of the semiconductor substrate.

Claims

1. A process for producing a semiconductor device, comprising:

laminating a first conductive type high-resistance layer formed of a single crystal silicon carbide of a hexagonal system on a first conductive type low-resistance layer formed of a single crystal silicon carbide of a hexagonal system to form a semiconductor substrate;

forming, on the surface of said semiconductor substrate, a second conductive type semiconductor layer of a single crystal silicon carbide of a hexagonal system, and forming a first conductive type semiconductor region in a predetermined region of said semiconductor layer;

forming a trench extending through said semiconductor region and said semiconductor layer into said semiconductor substrate, said trench having a side face and a bottom face, said bottom face having a flat surface of a (0001) carbon face;

performing a single thermal oxidizing step to thermally oxidize the inner wall of said trench to form a gate oxide layer as a gate insulating layer, the thickness of said gate oxide layer on the bottom face of said trench being larger than the thickness of said gate oxide layer on the side face of said trench, the thicker gate oxide layer on the bottom face being formed in the same oxidizing step as the thinner gate oxide layer on the side face; and

forming a gate electrode layer on the surface of said gate oxide layer, formed by thermal oxidation, within said trench, forming a first electrode layer on the surface of said semiconductor layer and on the surface of said semiconductor region, and forming a second electrode layer on the back surface of said semiconductor substrates,

wherein rounded corners are formed at an intersection of said side face and said bottom face of said trench during said single thermal oxidizing step.

2. A process for producing a semiconductor device according to claim 1, wherein said trench forming step includes the step of forming said side face of said trench to include a surface inclined at an angle of from 45°

to 90°

to said surface of said single crystal silicon carbide.

3. A process for producing a semiconductor device according to claim 1, wherein said trench forming step includes the step of forming said bottom face of said trench to include a surface parallel to said surface of said single crystal silicon carbide.

4. A process for producing a semiconductor device according to claim 1, wherein said oxidizing step includes the step of forming said gate oxide layer so that said thickness of said gate oxide layer on said bottom face of said trench is at least twice said thickness of said gate oxide layer on said side face of said trench.

5. A process for producing a semiconductor device according to claim 1, wherein said laminating step includes the step of forming a surface of said first conductive type high-resistance layer to have a (0001) carbon face.

6. A process for producing a semiconductor device according to claim 1, wherein said second conductive type semiconductor laver forming step includes the step of forming a surface of said second conductive type semiconductor layer to have a (0001) carbon face.

7. A process for producing a semiconductor device according to claim 1, wherein

said step of forming a trench through said semiconductor region and said semiconductor layer into said semiconductor substrate forms said trench by etching, and

said single thermal oxidizing step forms said oxide layer on said inner wall of said trench and said bottom face of said trench to follow a shape of said trench.

8. A process for producing a semiconductor device according to claim 1, wherein said single thermal oxidation step provides

a thick oxide layer means on said bottom face for an improved breakdown voltage, and

a thin oxide layer means on said side face for suppressing an increase in a threshold voltage.

9. A process for producing a vertical MOSFET using silicon carbide, comprising the steps of:

forming a trench in a silicon carbide substrate having rounded corners and a flat bottom face with a (0001) carbon face; and

forming a gate oxide layer in the trench so as to form

a thinner oxide layer on a trench side face in which a channel region is formed upon operation of the vertical MOSFET and

a thicker oxide layer having a greater thickness than the thinner oxide layer on a trench bottom face,

wherein the thinner oxide layer and the thicker oxide layer are formed in a single step.

10. A process for producing a semiconductor device, comprising:

laminating a first conductive type high-resistance layer formed of a single crystal silicon carbide of a hexagonal system on a first conductive type low-resistance layer formed of a single crystal silicon carbide of a hexagonal system to form a semiconductor substrate;

forming, on the surface of said semiconductor substrate, a second conductive type semiconductor layer of a single crystal silicon carbide of a hexagonal system, and forming a first conductive type semiconductor region in a predetermined region of said semiconductor layer;

forming a trench extending through said semiconductor region and said semiconductor layer into said semiconductor substrate, said trench having a side face and a bottom face, said bottom face having a surface with a first inclination of 30°

or less to a (0001) carbon face and said side face of said trench having a second inclination greater than 45° and

less than 90°

with respect to said (0001) carbon face;

thermally oxidizing an inner wall of said trench to form a gate oxide layer as a gate insulating layer in a single step, wherein a first oxidation speed of said side face is smaller than a second oxidation speed of said bottom face, the thickness of said gate oxide layer on the bottom face of said trench being larger than the thickness of said gate oxide layer on the side face of said trench, the difference between the thickness of said gate oxide layer on said bottom face of said trench to the thickness of said gate oxide layer on said side face of said trench varying with said second inclination, and the thicker gate oxide layer on the bottom face being formed in the same oxidizing step as the thinner gate oxide layer on the side face; and

forming a gate electrode layer on the surface of said gate oxide layer, formed by thermal oxidation, within said trench, forming a first electrode layer on the surface of said semiconductor layer and on the surface of said semiconductor region, and forming a second electrode layer on the back surface of said semiconductor substrate.

11. A process for producing a semiconductor device according to claim 10, wherein said first oxidation speed is about one-third of said second oxidation speed.

12. A process for producing a semiconductor device according to claim 10, wherein said single thermal oxidation step provides

a thick oxide layer means on said bottom face for an improved breakdown voltage, and

a thin oxide layer means on said side face for suppressing an increase in a threshold voltage.

13. A process for producing a semiconductor device according to claim 10, wherein forming said trench forms a trench having rounded corners and said bottom face has a flat region.