Arming method and apparatus for supplemental inflatable restraint system

• US 5,916,289 A
• Filed: 02/10/1997
• Issued: 06/29/1999
• Est. Priority Date: 02/10/1997
• Status: Expired due to Term

• Current Assignee: Delphi Technologies, Inc. (BorgWarner Incorporated)
• Original Assignee: Delco Electronics Corporation (Motors Liquidation Co. GUC Trust)
• Inventors: Fayyad, Salem Ahmad, Riling, James Jacob, Patterson, Sheri Lynn, Wideman, Troy Allen
• Primary Examiner(s): Cuchlinski, Jr., William A.
• Assistant Examiner(s): Saunders, Sean D.
• Application Number:
  US08/797,069
• Time in Patent Office: 869 Days
• Field of Search: 701/45, 701/46, 180/232, 180/271, 180/282, 280/734, 280/735, 280/730, 364/424, 340/436, 340/903
• US Class Current: 701/45
• CPC Class Codes: B60R 2021/0004 Frontal collision
• CPC Class Codes: B60R 2021/0006 Lateral collision
• CPC Class Codes: B60R 2021/01034 Controlling a plurality of restraint devices
• CPC Class Codes: B60R 21/013 including means for detecting collisions, impending collisions or roll-over
• CPC Class Codes: B60R 21/0132 responsive to vehicle motion parameters , e.g. to vehicle longitudinal or transversal deceleration or speed value
• CPC Class Codes: B60R 21/0136 responsive to actual contact with an obstacle , e.g. to vehicle deformation, bumper displacement or bumper velocity relative to the vehicle monitoring crash strength in combination with passenger seat detection B60R21/01558

Abstract

A SIR system has frontal air bags and side air bags both controlled by the same microprocessor. To guard against spurious deployment of side air bags with minimal software burden, a lateral accelerometer and an arming circuit detect side crash activity and apply an arming signal to a pulse accumulator circuit in the microprocessor which monitors the accumulator state to detect arming, thereby inhibiting deployment when the arming signal is absent. The arming circuit receives the accelerometer signal, removes the dc component which is subject to drift, adds a fixed offset voltage and compares the resultant signal to threshold values to produce an arming signal when a threshold is breached.

Claims

1. A supplemental restraint system having an air bag, an impact sensor, and a control circuit responsive to the impact sensor for determining when to deploy the air bag comprising:

an arming accelerometer for sensing impact activity and having an output;

an arming circuit coupled to the accelerometer output including

means responsive to the accelerometer for producing an acceleration signal with a fixed offset, and

means for detecting a predetermined variance of the acceleration signal from the offset and generating an arming output indicative of arming accelerometer activity; and

a microprocessor having an accumulator circuit connected to the arming circuit for receiving the arming output and effective for accumulating counts when the arming output is present, the microprocessor being programmed to inhibit air bag deployment when the count value reflects absence of arming output that is indicative of lateral acceleration activity.

2. The invention as defined in claim 1 wherein the microprocessor includes:

means for periodically resetting the accumulator count to zero and saving the count for the previous period; and

means for permitting deployment when either the current or the previous count is non-zero.

3. The invention as defined in claim 2 wherein the microprocessor includes:

an input connected to the accelerometer output;

the microprocessor being programmed to evaluate the accelerometer output to determine accelerometer failure and to permit deployment during accelerometer failure.

4. The invention as defined in claim 1 wherein the means responsive to the accelerometer for producing an acceleration signal with a fixed offset comprises;

a capacitive coupling to isolate any dc component of the accelerometer output and to pass an ac component; and

an offset circuit for applying a fixed offset to the ac component.

5. The invention as defined in claim 4 wherein the means for detecting a predetermined variance of the acceleration signal from the offset and generating an output indicative of acceleration activity comprises comparator means for comparing the acceleration signal to at least one threshold and producing the output when a threshold is surpassed.

6. In a supplemental restraint system having an impact sensor coupled to a controller including an accelerometer and a microprocessor for determining whether to issue a deploy command, a method of arming the controller comprising the steps of:

sensing acceleration by the accelerometer and producing a raw acceleration signal;

filtering any dc component from the raw signal and replacing it with a fixed offset to produce a refined acceleration signal;

producing an inhibit signal when the refined acceleration signal does not exceed preset thresholds; and

inhibiting airbag deployment when the inhibit signal is present, and arming the controller when the inhibit signal is absent to permit airbag deployment.

7. The invention as defined in claim 6 including:

continuously accumulating counts when the inhibit signal is absent; and

wherein the inhibiting step includes sampling the counts to detect the presence of the inhibit signal.

8. The invention as defined in claim 6 including:

continuously accumulating counts when the inhibit signal is absent;

periodically setting the current count to zero and storing the previous count; and

wherein the inhibiting step includes reading the current count and the previous count and detecting an inhibit signal when both counts are zero.

9. The invention as defined in claim 6 including the steps of:

diagnosing faults in the accelerometer; and

bypassing the inhibiting step when an accelerometer fault is detected.

10. The invention as defined in claim 6 including the steps of:

commanding accelerometer voltage shifts at power up;

sensing responses to the commanded shifts; and

upon failure to detect responses, setting an accelerometer fault and bypassing the inhibiting step.

11. The invention as defined in claim 6 wherein the raw acceleration signal normally has a dc offset, the steps of:

periodically testing the raw acceleration signal for shorts to ground or battery voltage; and

when a number of consecutive tests result in a short indication, setting a fault and bypassing the inhibiting step.