Power supply solution for mixed signal circuits

• US 5,917,367 A
• Filed: 02/11/1997
• Issued: 06/29/1999
• Est. Priority Date: 02/11/1997
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Woo, Ann K.
• Primary Examiner(s): Cunningham, Terry D.
• Application Number:
  US08/798,991
• Time in Patent Office: 868 Days
• Field of Search: 327/534, 327/536, 327/537, 307/110
• US Class Current: 327/537
• CPC Class Codes: G05F 3/247 producing a voltage or current as a predetermined function of the supply voltage

Abstract

There is provided an improved high-voltage generation circuit for use in a mixed signal circuit for multiplying an external power supply potential applied on its input to produce a higher output voltage at an output terminal. The high-voltage generation circuit is formed of a voltage multiplier circuit (114), a voltage comparator circuit (116), and switching circuitry (118). The voltage multiplier circuit is formed of a first stage (122) and at least one second stage (124) connected in series between the input terminal and the output terminal. The second stage is formed of a CMOS transistor (MP4) whose substrate is connected to a controlled node (N23). The voltage comparator circuit compares the external power supply potential and the output voltage and generates a control logic signal. The switching circuitry is responsive to the control logic signal for automatically connecting the controlled node to one of the external power supply potential and the output voltage so as to avoid forward-biasing of the substrate. As a result, there is achieved power savings and thus enhanced performance.

Claims

1. A high-voltage generation circuit for multiplying an external power supply potential applied on an input terminal to produce a higher output voltage at an output terminal comprising:

voltage multiplier means formed of a first stage and a plurality of second stages connected in series between the input terminal and the output terminal, each of said plurality of second stages being formed of a MOS transistor having a gate source and drain and local substrate, the drain-source conduction path of each of said plurality of second stages being connected in cascade, the local substrate of each said plurality of second stages being connected to a controlled node;

voltage comparator means for comparing said external power supply potential and said output voltage and for generating a control logic signal; and

switching circuit means responsive to said control logic signal for automatically coupling said controlled node to one of an output of the first stage of and said output voltage on the output terminal so as to avoid forward-biasing of said local substrate.

2. A high-voltage generation circuit as claimed in claim 1, wherein said MOS transistors of said plurality of second stages are P-channel MOS transistors whose source and drain are formed in corresponding N-well regions, each defining the local substrate.

3. A high-voltage generation circuit as claimed in claim 2, wherein said control logic signal from said voltage comparator means is at a high logic level when said external power supply potential is greater than said output voltage and is at a low logic level when said output voltage is greater than said external power supply potential.

4. A high-voltage generation circuit as claimed in claim 3, wherein said switching circuit means couples said controlled node to said external power supply potential when said control signal is at the high logic level and couples said controlled node to said output voltage when said control signal is at the low logic level.

5. A high-voltage generation circuit as claimed in claim 2, wherein said switching circuit means automatically couples said N-well regions to the higher of said external power supply potential and said output voltage so as to prevent the turning on of said substrate.

6. A high-voltage generation circuit as claimed in claim 4, wherein said voltage comparator means is comprised of a first input transistor having its gate connected to receive said external power supply potential, a second input transistor having its gate connected to receive said output voltage, a first load transistor coupled to said first input transistor, a second load transistor coupled to said second input transistor, and an inverter section formed of a P-channel transistor and an N-channel transistor, said inverter section having an output for providing said control logic signal.

7. A high-voltage generation circuit as claimed in claim 6, wherein said switching circuit means is comprised of first and second control transistors, said drains and substrates of said first and second control transistors being connected together and to said controlled node, said source of said first control transistor being connected to the source of said P-channel MOS transistor in a first stage of said plurality of second stages, said source of said second control transistor being connected to the drain of said P-channel MOS transistor in a last stage of said plurality of second stages, said gate of said second control transistor being connected to receive said control logic signal and said gate of said first control transistor being connected to receive a complement of said control logic signal.

8. A high-voltage generation circuit as claimed in claim 7, wherein said plurality of second stages further includes an inverter having its output connected to said gates of said P-channel MOS transistors in alternate ones of said plurality of second stages.

9. A high-voltage generation circuit as claimed in claim 8, wherein said inverter is formed of a P-channel transistor and an N-channel transistor, said source of said P-channel transistor being connected to a supply switching node.

10. A high-voltage generation circuit as claimed in claim 9, wherein said switching circuit means further includes means for switching said supply switching node between said external power supply potential and said output voltage.

11. A high-voltage generation circuit for multiplying an external power supply potential applied on an input terminal to produce a higher output voltage at an output terminal comprising:

voltage multiplier means including a first stage and at least one second stage connected in series between the input terminal and the output terminal, said at least one second stage being formed of a P-channel MOS transistor whose source and drain are connected between said first stage and the output terminal, the substrate of said P-channel MOS transistor being connected to a controlled node;

voltage comparator means for comparing said external power supply potential and said output voltage and for generating a control logic signal; and

switching circuit means responsive to said control logic signal for automatically coupling said substrate of said P-channel MOS transistor in said at least one second stage to the higher of an output of the first stage applied on the input terminal and said output voltage on the output terminal so as to prevent the turning on of said substrate.

12. A high-voltage generation circuit as claimed in claim 11, wherein said voltage comparator means is comprised of a first input transistor having its gate connected to receive said external power supply potential, a second input transistor having its gate connected to receive said output voltage, a first load transistor coupled to said first input transistor, a second load transistor coupled to said second input transistor, and an inverter section formed of a P-channel transistor and an N-channel transistor, said inverter section having an output for providing said control logic signal.

13. A high-voltage generation circuit as claimed in claim 12, wherein said switching circuit means is comprised of first and second control transistors, said drains and substrates of said first and second control transistors being connected together and to said controlled node, said source of said first control transistor being connected to the source of said P-channel MOS transistor in said at least one second stage, said source of said second control transistor being connected to the drain of said P-channel MOS transistor in said at least one second stage, said gate of said second control transistor being connected to receive said control logic signal and said gate of said first control transistor being connected to receive a complement of said control logic signal.

14. A high-voltage generation circuit as claimed in claim 13, wherein said at least one second stare further includes an inverter having its output connected to said gate of said P-channel MOS transistor in said at least one second stage.

15. A high-voltage generation circuit as claimed in claim 14, wherein said inverter is formed of a P-channel transistor and an N-channel transistor, said source of said P-channel transistor being connected to a supply switching node.

16. A high-voltage generation circuit as claimed in claim 15, wherein said switching circuit means further includes means for switching said supply switching node between said external power supply potential and said output voltage.

17. A high-voltage generation circuit having an input terminal and an output terminal comprising:

voltage multiplier means formed of a first stage and at least one second stage connected in series between the input terminal and the output terminal, said at least one second stage being formed of a MOS transistor having a gate, source, drain, and local substrate, the drain-source conduction path of each of said at least one second stage being connected in cascade, the local substrate of said at least one second stage being connected to a controlled node;

voltage comparator means for comparing an external power supply potential applied to the input terminal and an output voltage on the output terminal and for generating a control logic signal; and

switching circuit means responsive to said control logic signal for automatically coupling said substrate of said MOS transistor in said at least one second stage to one of said external power supply potential and said output voltage so as to prevent the turning on of said substrate.

18. A high-voltage generation circuit as claimed in claim 17, wherein said MOS transistor is a P-channel transistor and said switching circuit means automatically couples said substrate of said P-channel transistor to he higher of said external power supply potential and said output voltage so as to prevent the turning on of said substrate.