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Receiving apparatus, receiving method, and digital PLL circuit

  • US 5,917,873 A
  • Filed: 10/06/1997
  • Issued: 06/29/1999
  • Est. Priority Date: 10/08/1996
  • Status: Expired due to Fees
First Claim
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1. A receiving apparatus having a digital PLL circuit for generating a system clock corresponding to time reference information sent along with data and data process means for processing the data corresponding to the system clock,the PLL circuit comprising:

  • time reference information detecting means for detecting time reference information from the data and outputting the time reference information;

    variable frequency generating means for generating a clock with a predetermined frequency;

    clock count number outputting means for counting the clock and outputting the counted result;

    phase comparing means for comparing the time reference information and the counted result at a timing of which the time reference information is detected; and

    a feedback loop for feeding back the phase difference as a control signal to said variable frequency generating means through a filter means,wherein said filter means is coupled to the phase comparing means and includes calculating means for performing a predetermined calculation on received inputs and arithmetic means for performing an arithmetic operation on an output of the calculating means in accordance with a variable factor which varies in accordance with the received inputs of said calculating means.

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