MOS transistor with shield coplanar with gate electrode
First Claim
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1. A method of fabricating a MOS transistor with a self-aligned gate-drain electrode adjacent to a gate electrode and at least partially formed on a gate oxide, the method comprising the steps of:
- a) providing a silicon substrate of one conductivity type with a surface well region of a second conductivity type,b) forming source and channel regions in said well region,c) forming a gate oxide layer on a surface of the well region,d) forming a gate electrode on the gate oxide layer over the channel region, ande) forming a gate-drain shield electrode on the oxide layer adjacent to and spaced from the gate electrode at least partially coplanar with the gate electrode and overlying a drain region comprising a portion of the surface well region.
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Abstract
A MOS transistor including a gate electrode on a gate oxide over a channel region between a source region and a drain region also includes a shield electrode at least partially on the gate oxide adjacent to, self-aligned with, and at least partially coplanar with the gate electrode and between the gate electrode and drain region. Placing the shield electrode on the gate oxide improves the gate-drain shielding, reduces the gate-drain capacitance, Cgd, and reduces hot electron related reliability hazard.
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Citations
14 Claims
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1. A method of fabricating a MOS transistor with a self-aligned gate-drain electrode adjacent to a gate electrode and at least partially formed on a gate oxide, the method comprising the steps of:
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a) providing a silicon substrate of one conductivity type with a surface well region of a second conductivity type, b) forming source and channel regions in said well region, c) forming a gate oxide layer on a surface of the well region, d) forming a gate electrode on the gate oxide layer over the channel region, and e) forming a gate-drain shield electrode on the oxide layer adjacent to and spaced from the gate electrode at least partially coplanar with the gate electrode and overlying a drain region comprising a portion of the surface well region.
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2. A method of fabricating a MOS transistor with a self-aligned shield electrode adjacent to a gate electrode and at least partially formed on a gate oxide, the method comprising the steps of:
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a) providing a silicon substrate of one conductivity type with a surface well region of a second conductivity type, b) forming source and channel regions in said well region, c) forming a gate oxide layer on a surface of the well region, d) forming a gate electrode on the gate oxide layer over the channel region, and e) forming a shield electrode on the gate oxide layer adjacent to and spaced from the gate electrode and at least partially coplanar with the gate electrode, including depositing a conductive layer on the gate oxide and then etching the conductive layer to form both the gate electrode and the shield electrode on the same step. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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