Semiconductor device and method for producing the same

• US 5,920,106 A
• Filed: 12/09/1997
• Issued: 07/06/1999
• Est. Priority Date: 12/10/1996
• Status: Expired due to Term

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Oba, Nobukazu, Ikuta, Toshio, Sakai, Minekazu, Fukada, Tsuyoshi, Suzuki, Yasutoshi
• Primary Examiner(s): Hardy, David B.
• Application Number:
  US08/987,500
• Time in Patent Office: 574 Days
• Field of Search: 257/415, 257/417, 257/418, 257/419, 257/108, 438/53, 438/50
• US Class Current: 257/419
• CPC Class Codes: G01L 9/0042 Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms details about the integration or bonding of piezoresistor in or on the diaphragm G01L9/0052 and G01L9/0057 respectively

Abstract

A semiconductor pressure detection device includes a diaphragm formed at a portion of a P- conductivity type semiconductor substrate having a reduced thickness. Gauge resistors are formed on the surface of an N- conductivity type semiconductor layer formed on the substrate. An N+ conductivity type diffusion layer is formed in the N- conductivity type semiconductor layer to fix the electric potential of the N- conductivity type layer. The first conductivity type area surrounds the diaphragm. Therefore, when the N- conductivity type area is supplied with electric potential, the potential gradient in the N- conductivity type layer is small. Thus, the leakage current which flows to a pn junction between the gauge resistors and the N- conductivity type area is reduced.

Claims

1. A semiconductor device comprising:

a semiconductor substrate defining a diaphragm at a portion of the substrate that is thinner than a remainder of the substrate;

a first conductivity type layer formed on a surface of the semiconductor substrate;

gauge resistors of a second conductivity type formed in the first conductivity type layer and over the diaphragm;

a first conductivity type area surrounding at least one part of the diaphragm to fix an electric potential of the first conductivity type layer; and

a temperature compensation resistor formed in the first conductivity type layer outside the first conductivity type area;

wherein the gauge resistors are disposed in a position surrounded by the first conductivity type area; and

at least a portion of the first conductivity type area surrounds the temperature compensation resistor.

2. The semiconductor device of claim 1, wherein said first conductivity type area has an impurity concentration higher than the first conductivity type layer and is formed in the first conductivity type layer.

3. A semiconductor device comprising:

a semiconductor substrate defining a diaphragm at a portion of the substrate that is thinner than a remainder of the substrate;

a first conductivity type layer formed on a surface of the semiconductor substrate;

gauge resistors of a second conductivity type formed in the first conductivity type layer and over the diaphragm; and

a first conductivity type area surrounding at least one part of the diaphragm to fix an electric potential of the first conductivity type layer;

wherein the gauge resistors are disposed in a position surrounded by the first conductivity type area; and

the first conductivity type area is formed as a buried layer between the semiconductor substrate and the first conductivity type layer.

4. The semiconductor device according to claim 3, wherein the first conductivity type area is formed by doping antimony between the semiconductor substrate and the first conductivity type layer as an impurity.

5. The semiconductor device of claim 3, wherein said first conductivity type area has an impurity concentration higher than the first conductivity type layer and is formed in the first conductivity type layer.

6. A semiconductor device comprising:

a semiconductor substrate defining a diaphragm at a portion of the substrate that is thinner than a remainder of the substrate;

a first conductivity type layer formed on a surface of the semiconductor substrate;

gauge resistors of a second conductivity type formed in the first conductivity type layer and over the diaphragm;

a first conductivity type buried area formed between the semiconductor substrate and the first conductivity type layer to fix an electric potential of the first conductivity type layer;

a first conductivity type diffusion area vertically formed in the first conductivity type layer to contact with the first conductivity type buried area; and

a temperature compensation resistor formed in the first conductivity type layer outside of the first conductivity type area.

7. The semiconductor device according to claim 6, wherein a depth of the first conductivity type diffusion area is deeper than that of the gauge resistors.

8. The semiconductor device according to claim 7, wherein the depth of the first conductivity type diffusion area is approximately 10 μ

m, and a depth of a gauge resistors is between 1 and 1.5 μ

m.

9. The semiconductor device according to claim 6, wherein a depth of the first conductivity type diffusion area is deeper than that of the temperature compensation resistor.

10. The semiconductor device according to claim 9, wherein the depth of the first conductivity type diffusion area is approximately 10 μ

m, and a depth of the temperature compensation resistor is between 1 and 1.5 μ

m.

11. A semiconductor device comprising:

a semiconductor substrate defining a diaphragm at a portion of the substrate that is thinner than a remainder of the substrate;

a first conductivity type layer formed on a surface of the semiconductor substrate;

gauge resistors of a second conductivity type formed in the first conductivity type layer and over the diaphragm;

a first conductivity type area surrounding at least one part of the diaphragm to fix an electric potential of the first conductivity type layer; and

a power terminal being supplied with the fixed electric potential, connected with the first conductivity type area;

wherein the gauge resistors are disposed in a position surrounded by the first conductivity type area.

12. The semiconductor device of claim 11, wherein said first conductivity type area has an impurity concentration higher than the first conductivity type layer and is formed in the first conductivity type layer.

13. A semiconductor device comprising:

a diaphragm formed at a reduced thickness portion of a semiconductor substrate whose surface is made of a first conductivity type layer;

bridge connected gauge resistors of second conductivity type formed on the surface of the semiconductor substrate; and

a first conductivity type area fixing an electric potential of the first conductivity type layer; and

a power terminal being supplied with the fixed electric potential, connected with the first conductivity type area;

wherein the first conductivity type area surrounds the diaphragm.

14. The semiconductor device of claim 13, wherein said first conductivity type area has an impurity concentration higher than the first conductivity type layer and is formed in the first conductivity type layer.

15. A semiconductor device comprising:

a semiconductor substrate defining a diaphragm at a portion of the substrate that is thinner than a remainder of the substrate;

a first conductivity type layer formed on a surface of the semiconductor substrate;

gauge resistors of a second conductivity type, arranged as a bridge circuit, formed in an outer layer of the first conductivity type layer and over the diaphragm;

a power electric wiring being supplied with a fixed electric potential, connected with a power terminal of the bridge circuit;

a ground terminal wiring, connected with a ground terminal of the bridge circuit;

mid-point electric wirings, for outputting a mid-point potential of the bridge circuit; and

a first conductivity type area, whose impurity concentration is higher than the first conductivity type layer, surrounding at least one part of the diaphragm, formed in the first conductivity type layer and connected with the power electric wiring;

wherein the gauge resistors are disposed in a position surrounded by the first conductivity type area.

16. The semiconductor device according to claim 15, further comprising:

a power terminal being supplied with the fixed electric potential, connected with the first conductivity type area.

17. A method for producing a semiconductor device, the method comprising:

forming a first conductivity type layer on a semiconductor substrate;

forming gauge resistors of second conductivity type in the first conductivity type layer over a location of a diaphragm;

forming a first conductivity type area surrounding the location of the diaphragm to fix an electric potential of the first conductivity type layer; and

supplying the fixed electric potential to a power terminal connected to the first conductivity type area.

18. The method for producing a semiconductor device of claim 17, wherein said first conductivity type area is formed with has an impurity concentration higher than the first conductivity type layer and is formed in the first conductivity type layer.

19. A semiconductor device comprising:

a semiconductor substrate defining a diaphragm at a portion of the substrate that is thinner than a remainder of the substrate;

a first conductivity type layer formed on a surface of the semiconductor substrate;

gauge resistors of a second conductivity type formed in the first conductivity type layer and over the diaphragm;

a first conductivity type area, whose impurity concentration is higher than the first conductivity type layer, formed in the first conductivity type layer and surrounding at least one part of the diaphragm to fix an electric potential of the first conductivity type layer; and

a temperature compensation resistor formed in the first conductivity type layer;

wherein the gauge resistors are disposed in a position surrounded by the first conductivity type area, and the first conductivity area is disposed between the temperature compensation resistor and the gauge resistors.