Raised tungsten plug antifuse and fabrication processes

• US 5,920,109 A
• Filed: 12/23/1996
• Issued: 07/06/1999
• Est. Priority Date: 06/02/1995
• Status: Expired due to Term

• Current Assignee: Microsemi SoC Corp.
• Original Assignee: Actel Corporation (Microchip Technology Incorporated)
• Inventors: Eltoukhy, Abdelshafy, Go, Ying, McCollum, John L., Hawley, Frank W.
• Primary Examiner(s): Wallace, Valencia Martin
• Application Number:
  US08/772,241
• Time in Patent Office: 925 Days
• Field of Search: 257/50, 257/530, 257/903, 437/50, 437/195
• US Class Current: 257/530
• CPC Class Codes: H01L 23/5226 Via connections in a multilevel interconnection structure
• CPC Class Codes: H01L 23/5252 comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An antifuse comprises a lower electrode formed from a metal layer in a microcircuit. A interlayer dielectric layer is disposed over the lower electrode and has an aperture formed therein. A conductive plug, formed from a material such as tungsten, is formed in the aperture. The upper surface of the interlayer dielectric is etched back to create a raised portion of the plug. The upper edges of the plug are rounded. An antifuse layer, preferably comprising a silicon nitride, amorphous silicon, silicon nitride sandwich incorporating a thin silicon dioxide layer above or below the amorphous silicon layer or such a sandwich structure covered by a titanium nitride layer, is disposed above the plug. An upper electrode, preferably comprising a metal layer is disposed over the antifuse layer.

Claims

1. An antifuse comprising:

a lower conductive electrode having an upper surface and disposed over an insulating layer;

an interlayer dielectric layer disposed over said upper surface of said lower conductive electrode, said interlayer dielectric layer having an upper surface and having an aperture communicating with said lower conductive electrode formed therein;

a conductive plug disposed in said aperture, said conductive plug having an upper surface raised above said upper surface of said interlayer dielectric layer, an outer edge of said upper surface being rounded;

an antifuse layer having a lower surface and an upper surface, said lower surface disposed over and in contact with all of said upper surface of said conductive plug and at least a portion of said upper surface of said interlayer dielectric layer; and

an upper electrode disposed over said upper surface of said antifuse layer.

2. The antifuse of claim 1 wherein said antifuse layer comprises a first layer comprising silicon nitride, a second layer comprising amorphous silicon, and a third layer comprising silicon nitride.

3. The antifuse of claim 2 wherein outer edges of said first layer said second layer and said third layer form a substantial vertical wall and further including an oxide spacer in contact with said vertical wall.

4. The antifuse of claim 2, further including a layer of silicon dioxide disposed between said second layer and one of said first and third layers.

5. An antifuse comprising:

a lower conductive electrode having an upper surface and disposed over an insulating layer;

an interlayer dielectric layer disposed over said upper surface of said lower conductive electrode, said interlayer dielectric layer having an upper surface and having an aperture communicating with said lower conductive electrode formed therein;

a conductive plug disposed in said aperture, said conductive plug having an upper surface raised above said upper surface of said interlayer dielectric layer, an outer edge of said upper surface being rounded;

an antifuse layer having a lower surface and an upper surface, said lower surface disposed over and in contact with all of said upper surface of said conductive plug and at least a portion of said upper surface of said interlayer dielectric layer;

a layer of titanium nitride having an upper surface and a lower surface disposed over said upper surface of said antifuse layer; and

an upper electrode disposed over said upper surface of said layer of titanium nitride.

6. The antifuse of claim 5 wherein said antifuse layer comprises a first layer comprising silicon nitride, a second layer comprising amorphous silicon, and a third layer comprising silicon nitride.

7. The antifuse of claim 6 wherein outer edges of said first layer said second layer and said third layer form a substantial vertical wall and further including an oxide spacer in contact with said vertical wall.

8. The antifuse of claim 6, further including a layer of silicon dioxide disposed between said second layer and one of said first and third layers.

9. An antifuse comprising:

a lower conductive electrode having an upper surface and disposed over an insulating layer;

an interlayer dielectric layer disposed over said upper surface of said lower conductive electrode, said interlayer dielectric layer having an upper surface and having an aperture communicating with said lower conductive electrode formed therein;

a conductive plug disposed in said aperture, said conductive plug having an upper surface raised above said upper surface of said interlayer dielectric layer, an outer edge of said upper surface being rounded;

a first layer of titanium nitride having an upper surface and disposed over all of said upper surface of said conductive plug and at least a portion of said upper surface of said interlayer dielectric layer;

an antifuse layer having a lower surface and an upper surface, said lower surface disposed over and in contact with all of said upper surface of said conductive plug and at least a portion of said upper surface of said interlayer dielectric layer;

a second layer of titanium nitride having an upper surface and a lower surface disposed over said upper surface of said antifuse layer; and

an upper electrode disposed over said upper surface of said second layer of titanium nitride.

10. The antifuse of claim 9 wherein said antifuse layer comprises a first layer comprising silicon nitride, a second layer comprising amorphous silicon, and a third layer comprising silicon nitride.

11. The antifuse of claim 10 wherein outer edges of said first layer said second layer and said third layer form a substantial vertical wall and further including an oxide spacer in contact with said vertical wall.

12. The antifuse of claim 10, further including a layer of silicon dioxide disposed between said second layer and one of said first and third layers.