Timer-controlled computer system shutdown and startup

• US 5,920,727 A
• Filed: 08/07/1997
• Issued: 07/06/1999
• Est. Priority Date: 10/27/1993
• Status: Expired due to Fees

• Current Assignee: PDACO LIMITED
• Original Assignee: Elonex IP Holdings Limited
• Inventors: Kikinis, Dan, Dornier, Pascal
• Primary Examiner(s): Ray, Gopal C.
• Application Number:
  US08/908,534
• Time in Patent Office: 698 Days
• Field of Search: 395/750.03, 395/750.05, 395/750.06, 395/559, 364/707, 364/492
• US Class Current: 713/323
• CPC Class Codes: G06F 1/32 Means for saving power
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3215 Monitoring of peripheral devices

Abstract

A system for managing power levels for a general purpose computer having a standby and a full-power mode of operation provides apparatus and a method for monitoring times of user input and control routines for using the times of user input to calculate optimum times for initiating full power operation and standby mode. The control routines are configured to provide the optimum times to a real time clock that remains powered in the standby mode, which triggers switching elements to initiate full power and standby mode. In one embodiment of the system, startup and standby may be initiated either by user input or automatically by the power management system. Startup and standby initiation times may be different for different days and time periods based on both preprogrammed and calculated values.

Claims

1. A non-volatile memory device characterized by recorded computer code comprising instructions for accomplishing a method for managing power levels for a general-purpose computer, the method comprising steps of:

monitoring user input through logic routines for determining startup initiation and standby initiation times-of-day based on times-of-day of the user input;

providing the initiation times-of-day to a real time clock; and

Signaling for changing power levels by output from the real time clock.

2. The memory device of claim 1 comprising a Read Only Memory (ROM) including a basic input-output system (BIOS) routine for the general-purpose computer.