Method and apparatus for reducing key-up distortion by pre-heating transistors

• US 5,920,808 A
• Filed: 12/12/1996
• Issued: 07/06/1999
• Est. Priority Date: 12/12/1996
• Status: Expired due to Term

• Current Assignee: Quarterhill Inc. (f/k/a Wi-LAN Inc.)
• Original Assignee: Glenayre Electronics Incorporated (EDCI Holdings Incorporated)
• Inventors: Jones, David E., Walker, Mark A., Frederick, Thomas L., Murphy, Kevin P., Deters, Gerald D.
• Primary Examiner(s): Chin, Wellington
• Assistant Examiner(s): Ferguson, Keith
• Application Number:
  US08/764,798
• Time in Patent Office: 936 Days
• Field of Search: 455/126, 455/127, 455/67.3, 455/63, 455/296, 455/115, 455/116, 455/331, 330/289
• US Class Current: 455/127.1
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 3/1935 with junction-FET devices
• CPC Class Codes: H03F 3/601 using FET's, e.g. GaAs FET's H03F3/607, H03F3/608 take precedence

Abstract

A biasing circuit for a power amplifier, for use in a transmitter, that substantially reduces distortion during key-up and thereby reduces key-up time. The power amplifier includes an output transistor and a bias circuit. The bias circuit is applied to all the class AB stages of the power amplifier. The bias circuit provides to the output transistor a first bias level during the preheat period and a second bias level during the transmit period. This first bias level is predetermined to cause the output transistor to reach the steady-state junction temperature achieved by the output transistor during the transmit period (i.e., when transmitting output signals biased with the second bias level). The preheat period ends when this steady-state temperature is reached. Thus, the power amplifier can then transition to a transmit period having already reached the steady-state junction temperature. Because the output transistor is already heated to the steady-state junction temperature, "thermal" distortion (i.e., the distortion incurred when the output transistor'"'"'s junction temperature changes while transmitting) is avoided and the key-up time is reduced.

Claims

1. A power amplifier for use in a transmitter, the power amplifier comprising:

an output transistor having an input lead and an output lead; and

a bias circuit coupled to said input lead of said output transistor, wherein said bias circuit is configured to provide a first bias level to said output transistor when said transmitter is operating in a preheat period and to provide a second bias level when said transmitter is transmitting in a transmit period, wherein said output transistor is operative to generate substantially equal heat in said preheat period and said transmit period.

2. The power amplifier of claim 1 wherein said output transistor is operative to generate substantially equal heat in said preheat period and said transmit period.

3. The power amplifier of claim 2 wherein said bias circuit comprises a switch circuit configured to couple said first bias level to said input lead of said output transistor when said preheat period begins and to uncouple said first bias level from said input lead of said output transistor when said preheat period ends.

4. The power amplifier of claim 2 wherein said power amplifier is configured to provide RF power amplification when said preheat period ends.

5. The power amplifier of claim 2 wherein said output transistor provides during said preheat period a substantially DC output signal at said output lead of said output transistor, whereby said transmitter transmits substantially no signals.

6. The power amplifier of claim 5 further comprising a capacitor configured to couple said output lead of said output transistor to an antenna of said transmitter.

7. The power amplifier of claim 2 wherein said output transistor forms part of a class AB output stage of said power amplifier.

8. The power amplifier of claim 2 wherein said first bias level causes said output transistor to conduct a first bias current that is different from a second bias current conducted by said output transistor in response to said second bias level.

9. The power amplifier of claim 8 wherein said first and second bias levels are DC voltages.

10. The power amplifier of claim 9 wherein said first bias level is greater than said second bias level.

11. A transmitter comprising:

a modulator coupled to receive an input signal, said modulator configured to output a modulated carrier signal dependent on said input signal;

a predistorter coupled to said modulator, said predistorter configured to output a predistorted signal dependent on said modulated carrier signal from said modulator;

a power amplifier coupled to said predistorter, said power amplifier configured to output an amplified signal dependent on said predistorted signal from said predistorter, wherein said power amplifier comprises;

an output transistor having an input lead and an output lead, and

a bias circuit coupled to said input lead of said output transistor, wherein said bias circuit is configured to provide a first bias level to said output transistor when said transmitter is operating in a preheat period and to provide a second bias level when said transmitter is transmitting in a transmit period; and

a trainer coupled to power amplifier and said predistorter, said trainer configured to provide to said predistorter a training signal dependent on said amplified signal from said power amplifier,

wherein said predistorter is operative to introduce distortion to said modulated signal from said modulator substantially canceling distortion introduced by said power amplifier when said transmitter is transmitting.

12. The power amplifier of claim 11 wherein said output transistor is operative to generate substantially equal heat in said preheat period and said transmit period.

13. The power amplifier of claim 12 wherein said bias circuit comprises a switch circuit configured to couple said first bias level to said input lead of said output transistor when said preheat period begins and to uncouple said first bias level from said input lead of said output transistor when said preheat period ends.

14. The power amplifier of claim 12 wherein said output transistor provides during said preheat period a substantially DC output signal at said output lead of said output transistor, whereby said transmitter transmits substantially no signals.

15. The power amplifier of claim 14 further comprising a capacitor configured to couple said output lead of said output transistor to an antenna of said transmitter.

16. The power amplifier of claim 12 wherein said output transistor forms part of a class AB output stage of said power amplifier.

17. The power amplifier of claim 12 wherein said first and second bias levels are DC voltages.

18. A power amplifier for use in an RF transmitter, the power amplifier comprising:

an output transistor having an input lead coupled to receive a RF input signal; and

biasing means for providing a first bias level to said output transistor when said transistor is operating in a preheat period and to provide a second bias level when said transmitter is transmitting in a transmit period, wherein said biasing means is configured to provide said first and second bias levels so that said output transistor generates substantially equal heat in said preheat period and said transmit period.

19. The power amplifier of claim 18 wherein said biasing means is configured to provide said first and second bias levels so that said output transistor generates substantially equal heat in said preheat period and said transmit period.

20. A method of reducing key-up time in a transmitter, said transmitter having a power amplifier and being configured to operate in a preheat period and a transmit period, said method comprising:

biasing said power amplifier with a first bias level during said preheat period; and

biasing said power amplifier with a second bias level during said transmit period,

wherein said first bias level causes a temperature of a semiconductor junction of said power amplifier to increase to a temperature approximately equal to a steady-state temperature of said semiconductor junction when said transmitter is transmitting during said transmit period.

21. The method of claim 20 wherein said semiconductor junction is part of an output transistor of said power amplifier, said output transistor being configured to conduct a different bias current in response to said second bias level than said first bias level.

22. The method of claim 20 wherein said biasing said power amplifier with a first bias level during said preheat period comprises conducting a DC current through an output transistor of said power amplifier, wherein substantially no RF signal is transmitted by said transmitter during said preheat period.

23. The method of claim 20 wherein said first and second bias levels are DC voltages.